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/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-370.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 370 family SoC
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 * Contains definitions specific to the Armada 370 SoC that are not
12 * common to all Armada SoCs.
15 #include "armada-370-xp.dtsi"
18 #address-cells = <1>;
19 #size-cells = <1>;
21 model = "Marvell Armada 370 family SoC";
[all …]
H A Darmada-370-rd.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Marvell Armada 370 Reference Design board
4 * (RD-88F6710-A1)
6 * Copied from arch/arm/boot/dts/armada-370-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include <dt-bindings/input/input.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
23 #include <dt-bindings/leds/common.h>
24 #include <dt-bindings/gpio/gpio.h>
[all …]
H A Darmada-370-seagate-nas-2bay.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Seagate NAS 2-Bay (Armada 370 SoC).
13 * Product name : Seagate NAS 2-Bay
14 * Code name (board/PCB) : Dart 2-Bay
19 /dts-v1/;
20 #include "armada-370-seagate-nas-xbay.dtsi"
23 model = "Seagate NAS 2-Bay (Dart, SRPD20)";
24 compatible = "seagate,dart-2", "marvell,armada370", "marvell,armada-370-xp";
26 gpio-fan {
27 gpio-fan,speed-map =
H A Darmada-370-seagate-nas-4bay.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Seagate NAS 4-Bay (Armada 370 SoC).
13 * Product name : Seagate NAS 4-Bay
14 * Code name (board/PCB) : Dart 4-Bay
19 /dts-v1/;
20 #include "armada-370-seagate-nas-xbay.dtsi"
21 #include <dt-bindings/leds/leds-ns2.h>
24 model = "Seagate NAS 4-Bay (Dart, SRPD40)";
25 compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
28 internal-regs {
[all …]
H A Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 38x family of SoCs.
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
21 model = "Marvell Armada 38x family SoC";
32 compatible = "arm,cortex-a9-pmu";
[all …]
H A Darmada-370-seagate-personal-cloud-2bay.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Seagate Personal Cloud NAS 2-Bay (Armada 370 SoC).
13 * Product name : Seagate Personal Cloud 2-Bay
19 /dts-v1/;
20 #include "armada-370-seagate-personal-cloud.dtsi"
23 model = "Seagate Personal Cloud 2-Bay (Cumulus, SRN22C)";
24 compatible = "seagate,cumulus-max", "marvell,armada370", "marvell,armada-370-xp";
27 internal-regs {
30 nr-ports = <2>;
35 regulator-2 {
[all …]
H A Darmada-xp-98dx3236.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * common to all Armada XP SoCs.
11 #include "armada-370-xp.dtsi"
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,98dx3236-smp";
33 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-xp-mv78230.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada XP family SoC
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Contains definitions specific to the Armada XP MV78230 SoC that are not
10 * common to all Armada XP SoCs.
13 #include "armada-xp.dtsi"
16 model = "Marvell Armada XP MV78230 SoC";
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
H A Darmada-xp-mv78260.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada XP family SoC
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Contains definitions specific to the Armada XP MV78260 SoC that are not
10 * common to all Armada XP SoCs.
13 #include "armada-xp.dtsi"
16 model = "Marvell Armada XP MV78260 SoC";
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
H A Darmada-xp-mv78460.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada XP family SoC
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Contains definitions specific to the Armada XP MV78460 SoC that are not
10 * common to all Armada XP SoCs.
13 #include "armada-xp.dtsi"
16 model = "Marvell Armada XP MV78460 SoC";
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
H A Darmada-375.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 375 family SoC
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
21 model = "Marvell Armada 375 family SoC";
[all …]
H A Darmada-370-seagate-personal-cloud.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree common file for the Seagate Personal Cloud NAS 1 and 2-Bay
4 * (Armada 370 SoC).
15 #include "armada-370.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
33 internal-regs {
34 coherency-fabric@20200 {
35 broken-idle;
[all …]
H A Darmada-370-mirabox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include "armada-370.dtsi"
14 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
17 stdout-path = "serial0:115200n8";
30 internal-regs {
35 clock-frequency = <600000000>;
40 compatible = "gpio-leds";
[all …]
H A Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 39x family of SoCs.
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
18 model = "Marvell Armada 39x family SoC";
31 #address-cells = <1>;
32 #size-cells = <0>;
[all …]
H A Darmada-370-seagate-nas-xbay.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC).
14 #include "armada-370.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
20 stdout-path = "serial0:115200n8";
32 internal-regs {
38 nr-ports = <2>;
44 pinctrl-0 = <&ge0_rgmii_pins>;
45 pinctrl-names = "default";
[all …]
H A Darmada-370-netgear-rn102.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-370.dtsi"
16 compatible = "netgear,readynas-102", "marvell,armada370", "marvell,armada-370-xp";
19 stdout-path = "serial0:115200n8";
32 internal-regs {
45 nr-ports = <1>;
50 pinctrl-0 = <&ge1_rgmii_pins>;
[all …]
H A Darmada-370-netgear-rn104.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-370.dtsi"
16 compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp";
19 stdout-path = "serial0:115200n8";
32 internal-regs {
44 pinctrl-0 = <&ge0_rgmii_pins>;
45 pinctrl-names = "default";
[all …]
H A Darmada-370-dlink-dns327l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for D-Link DNS-327L
12 /dts-v1/;
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
19 model = "D-Link DNS-327L";
22 "marvell,armada-370-xp";
25 stdout-path = &uart0;
38 internal-regs {
[all …]
H A Darmada-xp-axpwifiap.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Marvell RD-AXPWiFiAP.
12 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include "armada-xp-mv78230.dtsi"
21 model = "Marvell RD-AXPWiFiAP";
22 …compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,arma…
25 stdout-path = "serial0:115200n8";
[all …]
H A Darmada-370-synology-ds213j.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
12 * were delivered with an older version of u-boot that left internal
17 * installing it from u-boot prompt) or adjust the Devive Tree
21 /dts-v1/;
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-370.dtsi"
30 "marvell,armada-370-xp";
33 stdout-path = "serial0:115200n8";
[all …]
H A Darmada-370-c200-v2.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Device Tree file for Ctera C200-V2
8 /dts-v1/;
10 #include "armada-370.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/leds/common.h>
18 compatible = "ctera,c200-v2", "marvell,armada370", "marvell,armada-370-xp";
22 stdout-path = "serial0:115200n8";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-mvebu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell EBU GPIO controller
10 - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 - Andrew Lunn <andrew@lunn.ch>
16 - enum:
17 - marvell,armada-8k-gpio
18 - marvell,orion-gpio
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 38x family of SoCs.
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
19 model = "Marvell Armada 38x family SoC";
30 compatible = "arm,cortex-a9-pmu";
31 interrupts-extended = <&mpic 3>;
35 compatible = "marvell,armada380-mbus", "simple-bus";
[all …]
H A Darmada-375.dtsi2 * Device Tree Include file for Marvell Armada 375 family SoC
6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * This file is dual-licensed: you can use it either under the terms
49 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
51 #include <dt-bindings/phy/phy.h>
56 model = "Marvell Armada 375 family SoC";
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-orion.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2007-2008 Marvell Ltd.
73 * have both is for managing the armada-370-spi case with old
110 return orion_spi->base + reg; in spi_reg()
144 orion_spi = spi_controller_get_devdata(spi->controller); in orion_spi_baudrate_set()
145 devdata = orion_spi->devdata; in orion_spi_baudrate_set()
147 tclk_hz = clk_get_rate(orion_spi->clk); in orion_spi_baudrate_set()
149 if (devdata->typ == ARMADA_SPI) { in orion_spi_baudrate_set()
177 sppr = fls(divider) - 4; in orion_spi_baudrate_set()
184 divider = (divider + two_pow_sppr - 1) & -two_pow_sppr; in orion_spi_baudrate_set()
[all …]

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