Home
last modified time | relevance | path

Searched full:andestech (Results 1 – 25 of 132) sorted by relevance

123456

/openbmc/u-boot/arch/riscv/dts/
H A Dae350_64.dts6 compatible = "andestech,ax25";
7 model = "andestech,ax25";
49 compatible = "andestech,riscv-ae350-soc";
86 compatible = "andestech,atcpit100";
94 compatible = "andestech,uart16550", "ns16550a";
105 compatible = "andestech,atmac100";
112 compatible = "andestech,atfsdc010";
123 compatible = "andestech,atcdmac300";
131 compatible = "andestech,atflcdc100";
138 compatible = "andestech,atfsmc020";
[all …]
H A Dae350_32.dts6 compatible = "andestech,a25";
7 model = "andestech,a25";
49 compatible = "andestech,riscv-ae350-soc";
86 compatible = "andestech,atcpit100";
94 compatible = "andestech,uart16550", "ns16550a";
105 compatible = "andestech,atmac100";
112 compatible = "andestech,atfsdc010";
123 compatible = "andestech,atcdmac300";
131 compatible = "andestech,atflcdc100";
138 compatible = "andestech,atfsmc020";
[all …]
/openbmc/u-boot/arch/nds32/dts/
H A Dae3xx.dts36 compatible = "andestech,n13";
44 compatible = "andestech,atnointc010";
50 compatible = "andestech,uart16550", "ns16550a";
60 compatible = "andestech,atcpit100";
67 compatible = "andestech,atmac100";
73 compatible = "andestech,atfsdc010";
88 compatible = "andestech,atcspi200";
H A Dag101p.dts29 compatible = "andestech,n13";
37 compatible = "andestech,atnointc010";
43 compatible = "andestech,uart16550", "ns16550a";
52 compatible = "andestech,attmr010";
59 compatible = "andestech,atmac100";
65 compatible = "andestech,atfsdc010";
/openbmc/u-boot/doc/device-tree-bindings/timer/
H A Datcpit100_timer.txt1 Andestech ATCPIT100 timer
4 Andestech AE3XX, AE250 platforms and other designs.
19 - compatible : Should be "andestech,atcpit100"
22 - clock-frequency : The rate in HZ in input of the Andestech ATCPIT100 timer
27 compatible = "andestech,atcpit100";
/openbmc/linux/Documentation/devicetree/bindings/cache/
H A Dandestech,ax45mp-cache.yaml5 $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
8 title: Andestech AX45MP L2 Cache Controller
23 - andestech,ax45mp-cache
31 - const: andestech,ax45mp-cache
73 compatible = "andestech,ax45mp-cache", "cache";
/openbmc/u-boot/arch/riscv/include/asm/
H A Dtypes.h3 * Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
4 * Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
5 * Copyright (C) 2017 Rick Chen (rick@andestech.com)
H A Dprocessor.h7 * Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
8 * Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
9 * Copyright (C) 2017 Rick Chen (rick@andestech.com)
H A Dstring.h3 * Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
4 * Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
5 * Copyright (C) 2017 Rick Chen (rick@andestech.com)
H A Dposix_types.h7 * Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
8 * Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
9 * Copyright (C) 2017 Rick Chen (rick@andestech.com)
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dspi-atcspi200.txt1 Andestech ATCSPI200 SPI controller Device Tree Bindings
9 - compatible: has to be "andestech,atcspi200".
23 compatible = "andestech,atcspi200";
/openbmc/u-boot/board/AndesTech/adp-ag101p/
H A DMAINTAINERS2 M: Andes <uboot@andestech.com>
4 F: board/AndesTech/adp-ag101p/
H A DMakefile4 # Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
5 # Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
/openbmc/u-boot/board/AndesTech/adp-ae3xx/
H A DMAINTAINERS2 M: Andes <uboot@andestech.com>
4 F: board/AndesTech/adp-ae3xx/
/openbmc/u-boot/board/AndesTech/ax25-ae350/
H A DMAINTAINERS2 M: Rick Chen <rick@andestech.com>
4 F: board/AndesTech/ax25-ae350/
/openbmc/u-boot/arch/nds32/
H A DKconfig19 source "board/AndesTech/adp-ag101p/Kconfig"
20 source "board/AndesTech/adp-ae3xx/Kconfig"
H A Dconfig.mk7 # Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8 # Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
/openbmc/u-boot/arch/nds32/include/asm/
H A Dconfig.h4 * Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
5 * Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
H A Dtypes.h3 * Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
4 * Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
/openbmc/u-boot/arch/nds32/cpu/n1213/ae3xx/
H A DMakefile8 # Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
9 # Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
H A Dtimer.c7 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
/openbmc/u-boot/arch/nds32/lib/
H A DMakefile7 # Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8 # Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
/openbmc/u-boot/arch/nds32/cpu/n1213/ag101/
H A DMakefile8 # Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
9 # Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
/openbmc/u-boot/arch/riscv/lib/
H A Dbootm.c4 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
5 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
6 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
/openbmc/u-boot/arch/nds32/cpu/n1213/
H A DMakefile7 # Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8 # Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>

123456