| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | allwinner,sun8i-a23-prcm.yaml | 133 ahb0: ahb0_clk {
139 clock-output-names = "ahb0";
145 clocks = <&ahb0>;
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| H A D | allwinner,sun6i-a31-prcm.yaml | 183 ahb0: ahb0_clk {
189 clock-output-names = "ahb0";
195 clocks = <&ahb0>;
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| /openbmc/linux/drivers/clk/sunxi-ng/ |
| H A D | ccu-sun9i-a80.c | 270 .hw.init = CLK_HW_INIT_PARENTS("ahb0",
712 /* AHB0 bus gates */
713 static SUNXI_CCU_GATE(bus_fd_clk, "bus-fd", "ahb0",
715 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "ahb0",
717 static SUNXI_CCU_GATE(bus_gpu_ctrl_clk, "bus-gpu-ctrl", "ahb0",
719 static SUNXI_CCU_GATE(bus_ss_clk, "bus-ss", "ahb0",
721 static SUNXI_CCU_GATE(bus_mmc_clk, "bus-mmc", "ahb0",
723 static SUNXI_CCU_GATE(bus_nand0_clk, "bus-nand0", "ahb0",
725 static SUNXI_CCU_GATE(bus_nand1_clk, "bus-nand1", "ahb0",
727 static SUNXI_CCU_GATE(bus_sdram_clk, "bus-sdram", "ahb0",
[all …]
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| H A D | ccu-sun8i-r.c | 53 static CLK_FIXED_FACTOR_HW(ahb0_clk, "ahb0", &ar100_clk.common.hw, 1, 1, 0);
55 static SUNXI_CCU_M(apb0_clk, "apb0", "ahb0", 0x0c, 0, 2, 0);
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| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun9i.h | 29 u32 ahb0_cfg; /* 0x60 ahb0 clock configuration */
83 u32 ahb_gate0; /* 0x580 AHB0 Gating Register */
90 u32 ahb_reset0_cfg; /* 0x5a0 AHB0 Software Reset Register */
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| H A D | cpu_sun9i.h | 21 /* AHB0 Module */
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | allwinner,sun9i-a80-ahb-clk.yaml | 49 clock-output-names = "ahb0";
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| H A D | allwinner,sun4i-a10-gates-clk.yaml | 32 - const: allwinner,sun9i-a80-ahb0-gates-clk
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| /openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/ |
| H A D | jz4780.h | 12 /* AHB0 BUS Devices */
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| /openbmc/linux/Documentation/devicetree/bindings/dma/ |
| H A D | arm-pl08x.yaml | 134 /* Bus interface AHB1 (AHB0) is totally tilted */
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | sun8i-a23-a33.dtsi | 576 ahb0: ahb0_clk { label
582 clock-output-names = "ahb0";
588 clocks = <&ahb0>;
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| H A D | sun6i-a31.dtsi | 1278 ahb0: ahb0_clk { label
1284 clock-output-names = "ahb0";
1290 clocks = <&ahb0>;
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| /openbmc/linux/drivers/clk/sunxi/ |
| H A D | clk-simple-gates.c | 127 CLK_OF_DECLARE(sun9i_a80_ahb0, "allwinner,sun9i-a80-ahb0-gates-clk",
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| H A D | clk-sun9i-core.c | 149 * sun9i_a80_get_ahb_factors() - calculates p factor for AHB0/1/2
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| /openbmc/linux/arch/arm/boot/dts/allwinner/ |
| H A D | sun8i-a23-a33.dtsi | 745 ahb0: ahb0_clk { label
751 clock-output-names = "ahb0";
757 clocks = <&ahb0>;
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| H A D | sun6i-a31.dtsi | 1330 ahb0: ahb0_clk { label
1336 clock-output-names = "ahb0";
1342 clocks = <&ahb0>;
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| /openbmc/u-boot/arch/arm/mach-sunxi/ |
| H A D | clock_sun9i.c | 40 /* AHB0: 120 MHz (PLL_PERIPH0 / 8) */ in clock_init_safe()
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| /openbmc/linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini.dtsi | 420 /* Bus interface AHB1 (AHB0) is totally tilted */
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| /openbmc/linux/drivers/clk/ingenic/ |
| H A D | x1000-cgu.c | 309 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
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| H A D | x1830-cgu.c | 246 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
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| H A D | jz4780-cgu.c | 365 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
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| /openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/ |
| H A D | pll.c | 393 /* Init CPU, L2CACHE, AHB0, AHB2, APB clock */ in cpu_mux_select()
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| /openbmc/linux/drivers/clk/starfive/ |
| H A D | clk-starfive-jh7110-sys.c | 56 JH71X0_GATE(JH7110_SYSCLK_AHB0, "ahb0", CLK_IS_CRITICAL, JH7110_SYSCLK_STG_AXIAHB),
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| /openbmc/linux/drivers/dma/ |
| H A D | amba-pl08x.c | 2739 (val & BIT(9)) ? "AHB0 and AHB1" : "AHB0", in pl08x_probe()
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