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/openbmc/linux/arch/powerpc/platforms/powernv/
H A Dvas-debug.c32 struct pnv_vas_window *window = s->private; in info_show() local
36 /* ensure window is not unmapped */ in info_show()
37 if (!window->hvwc_map) in info_show()
40 seq_printf(s, "Type: %s, %s\n", cop_to_str(window->vas_win.cop), in info_show()
41 window->tx_win ? "Send" : "Receive"); in info_show()
42 seq_printf(s, "Pid : %d\n", vas_window_pid(&window->vas_win)); in info_show()
59 struct pnv_vas_window *window = s->private; in hvwc_show() local
63 /* ensure window is not unmapped */ in hvwc_show()
64 if (!window->hvwc_map) in hvwc_show()
67 print_reg(s, window, VREG(LPID)); in hvwc_show()
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H A Dvas-window.c27 * Compute the paste address region for the window @window using the
30 void vas_win_paste_addr(struct pnv_vas_window *window, u64 *addr, int *len) in vas_win_paste_addr() argument
35 base = window->vinst->paste_base_addr; in vas_win_paste_addr()
36 shift = window->vinst->paste_win_id_shift; in vas_win_paste_addr()
37 winid = window->vas_win.winid; in vas_win_paste_addr()
46 static inline void get_hvwc_mmio_bar(struct pnv_vas_window *window, in get_hvwc_mmio_bar() argument
51 pbaddr = window->vinst->hvwc_bar_start; in get_hvwc_mmio_bar()
52 *start = pbaddr + window->vas_win.winid * VAS_HVWC_SIZE; in get_hvwc_mmio_bar()
56 static inline void get_uwc_mmio_bar(struct pnv_vas_window *window, in get_uwc_mmio_bar() argument
61 pbaddr = window->vinst->uwc_bar_start; in get_uwc_mmio_bar()
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H A Dvas.h31 * Senders and receivers must each connect to a separate window before they
34 * Each window is described by two types of window contexts:
36 * Hypervisor Window Context (HVWC) of size VAS_HVWC_SIZE bytes
38 * OS/User Window Context (UWC) of size VAS_UWC_SIZE bytes.
40 * A window context can be viewed as a set of 64-bit registers. The settings
42 * hardware when messages are sent/received through the window. The registers
45 * the window.
61 * space (hvwc_map and uwc_map). The kernel can then access the window
62 * contexts of a specific window using:
67 * where winid is the window index (0..64K).
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H A Dvas-fault.c21 * The maximum FIFO size for fault window can be 8MB
23 * instance will be having fault window.
51 * It takes credit on fault window, updates nx_fault_stamp in CRB with
54 * pswid - window ID of the window on which the request is sent.
61 * available on fault window. Otherwise, returns with RMA_reject.
63 * Total credits available on fault window: FIFO_SIZE(4MB)/CRBS_SIZE(128)
71 struct pnv_vas_window *window; in vas_fault_thread_fn() local
84 * pswid NX assigns window ID. Set pswid to -1 after in vas_fault_thread_fn()
123 * Return credit for the fault window. in vas_fault_thread_fn()
132 window = vas_pswid_to_window(vinst, in vas_fault_thread_fn()
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/openbmc/phosphor-mboxd/
H A Dmboxd_windows.c37 * init_window_state() - Initialise a new window to a known state
38 * @window: The window to initialise
39 * @size: The size of the window
41 static void init_window_state(struct window_context *window, uint32_t size) in init_window_state() argument
43 window->mem = NULL; in init_window_state()
44 window->flash_offset = FLASH_OFFSET_UNINIT; in init_window_state()
45 window->size = size; in init_window_state()
46 window->dirty_bmap = NULL; in init_window_state()
47 window->age = 0; in init_window_state()
64 * order, so the first window will be first in memory and so on. We in init_window_mem()
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H A Dmboxd_msg.c138 struct window_context *window = find_largest_window(context); in get_suggested_timeout() local
139 uint32_t max_size_mb = window ? (window->size >> 20) : 0; in get_suggested_timeout()
144 MSG_DBG("Suggested Timeout: %us, max window size: %uMB, for %dms/MB\n", in get_suggested_timeout()
151 * Get the API version, default window size and block size
153 * this command must be called before any window manipulation
159 * RESP[1:2]: Default read window size (number of blocks)
160 * RESP[3:4]: Default write window size (number of blocks)
167 * RESP[1:2]: Default read window size (number of blocks)
168 * RESP[3:4]: Default write window size (number of blocks)
210 /* Now we know the blocksize we can allocate the window dirty_bytemap */ in mbox_handle_mbox_info()
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/openbmc/linux/drivers/mtd/maps/
H A Dichxrom.c57 static void ichxrom_cleanup(struct ichxrom_window *window) in ichxrom_cleanup() argument
63 /* Disable writes through the rom window */ in ichxrom_cleanup()
64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); in ichxrom_cleanup()
66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); in ichxrom_cleanup()
67 pci_dev_put(window->pdev); in ichxrom_cleanup()
70 list_for_each_entry_safe(map, scratch, &window->maps, list) { in ichxrom_cleanup()
78 if (window->rsrc.parent) in ichxrom_cleanup()
79 release_resource(&window->rsrc); in ichxrom_cleanup()
80 if (window->virt) { in ichxrom_cleanup()
81 iounmap(window->virt); in ichxrom_cleanup()
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H A Damd76xrom.c48 /* The 2 bits controlling the window size are often set to allow reading
56 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
57 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
58 * 64KiB window.
63 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.…
69 static void amd76xrom_cleanup(struct amd76xrom_window *window) in amd76xrom_cleanup() argument
74 if (window->pdev) { in amd76xrom_cleanup()
75 /* Disable writes through the rom window */ in amd76xrom_cleanup()
76 pci_read_config_byte(window->pdev, 0x40, &byte); in amd76xrom_cleanup()
77 pci_write_config_byte(window->pdev, 0x40, byte & ~1); in amd76xrom_cleanup()
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H A Dck804xrom.c54 * The 2 bits controlling the window size are often set to allow reading
62 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
63 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
64 * 64KiB window.
67 * The 15 bits controlling the window size are distributed as follows:
71 * If all bits are enabled, we have a 16? MiB window
76 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override, normally set by BIOS.");
82 static void ck804xrom_cleanup(struct ck804xrom_window *window) in ck804xrom_cleanup() argument
87 if (window->pdev) { in ck804xrom_cleanup()
88 /* Disable writes through the rom window */ in ck804xrom_cleanup()
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H A Desb2rom.c118 static void esb2rom_cleanup(struct esb2rom_window *window) in esb2rom_cleanup() argument
123 /* Disable writes through the rom window */ in esb2rom_cleanup()
124 pci_read_config_byte(window->pdev, BIOS_CNTL, &byte); in esb2rom_cleanup()
125 pci_write_config_byte(window->pdev, BIOS_CNTL, in esb2rom_cleanup()
129 list_for_each_entry_safe(map, scratch, &window->maps, list) { in esb2rom_cleanup()
137 if (window->rsrc.parent) in esb2rom_cleanup()
138 release_resource(&window->rsrc); in esb2rom_cleanup()
139 if (window->virt) { in esb2rom_cleanup()
140 iounmap(window->virt); in esb2rom_cleanup()
141 window->virt = NULL; in esb2rom_cleanup()
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/openbmc/hiomapd/
H A Dwindows.c40 * init_window_state() - Initialise a new window to a known state
41 * @window: The window to initialise
42 * @size: The size of the window
44 static void init_window_state(struct window_context *window, uint32_t size) in init_window_state() argument
46 window->mem = NULL; in init_window_state()
47 window->flash_offset = FLASH_OFFSET_UNINIT; in init_window_state()
48 window->size = size; in init_window_state()
49 window->dirty_bmap = NULL; in init_window_state()
50 window->age = 0; in init_window_state()
67 * order, so the first window will be first in memory and so on. We in init_window_mem()
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/openbmc/phosphor-mboxd/Documentation/
H A Dmbox_protocol.md71 "window" (which is the LPC -> AHB FW space mapping) that is either a read
72 window or a write window onto the flash.
74 When set for writing, the BMC makes the window point to a chunk of RAM instead.
76 actual flashing from the data in the RAM window.
78 The idea is to have the LPC FW space be routed to an active "window". That
79 window can be a read or a write window. The commands allow to control which
80 window and which offset into the flash it maps.
82 * A read window can be a direct window to the flash controller space (ie.
83 0x3000\_0000) or it can be a window to a RAM image of a flash. It doesn't have
90 * A write window has to be a chunk of BMC memory. The minimum size is not
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/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_windowed.S21 .macro overflow_test shift, window, probe_ok, probe_ex
26 movi a2, 1 | (((1 << ((\window) / 4)) | 1) << ((\shift) / 4))
31 set_vector window_overflow_\window, 10f
54 movi a3, 1 | ((1 << ((\window) / 4)) << ((\shift) / 4))
61 .macro overflow_tests shift, window, probe
63 overflow_test \shift, \window, %((\shift) - 1), \probe
64 overflow_tests \shift, \window, %((\probe) + 1)
70 .irp window, 4, 8, 12
71 overflow_tests \shift, \window, \shift
81 .macro underflow_test window argument
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/openbmc/linux/arch/sparc/kernel/
H A Dwuf.S3 * wuf.S: Window underflow trap handler for the Sparc.
53 * 1 2 3 4 <-- Window number
57 * O == the window that execution was in when
61 * window
63 * W == this window is the one which is now invalid
67 * I == this window will be the invalid one when we
73 /* On 7-window Sparc the boot code patches fnwin_patch1
83 /* LOCATION: Window 'T' */
86 * the proper window off of the stack.
93 wr %twin_tmp1, 0x0, %wim /* Make window 'I' invalid */
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H A Dwof.S3 * wof.S: Sparc window overflow handler.
29 * accessed when in the 'trap' window, 'G' means
30 * accessible in any window. Do not change these registers
43 #define twin_tmp l4 /* Temp reg, only usable in trap window T */
49 /* On a 7-window Sparc the boot code patches spnwin_*
74 /* LOCATION: Trap Window */
80 * window properly in this trap handler.
105 /* Save into the window which must be saved and do it.
110 save %g0, %g0, %g0 ! save into the window to stash away
114 /* LOCATION: Window to be saved */
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H A Detrap_32.S3 * etrap.S: Sparc trap window preparation for entry into the
33 /* SEVEN WINDOW PATCH INSTRUCTIONS */
54 * to call c-code and the trap cannot be handled in-window)
62 /* 2 3 4 window number
66 * O == Current window before trap
67 * T == Window entered when trap occurred
68 * S == Window we will need to save if (1<<T) == %wim
79 /* Calculate mask of trap window. See if from user
93 /* See if we are in the trap window. */
95 bne trap_setup_kernel_spill ! in trap window, clean up
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H A Dwindows.c2 /* windows.c: Routines to deal with register window management
54 * we still copy the window there, the only case that we don't
64 int window; in synchronize_user_stack() local
71 for(window = tp->w_saved - 1; window >= 0; window--) { in synchronize_user_stack()
72 unsigned long sp = tp->rwbuf_stkptrs[window]; in synchronize_user_stack()
75 if (copy_to_user((char __user *) sp, &tp->reg_window[window], in synchronize_user_stack()
79 shift_window_buffer(window, tp->w_saved - 1, tp); in synchronize_user_stack()
109 /* Try to push the windows in a threads window buffer to the
116 int window; in try_to_clear_window_buffer() local
119 for(window = 0; window < tp->w_saved; window++) { in try_to_clear_window_buffer()
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/openbmc/linux/arch/powerpc/include/asm/
H A Dvas.h33 * VAS window Linux status bits
37 /* Window is closed in the hypervisor due to lost credit */
39 /* Window is closed due to migration */
66 * Stores pid, mm, and tgid for each window.
78 * Common VAS window struct on PowerNV and PowerVM
82 u32 wcreds_max; /* Window credits */
83 u32 status; /* Window status used in OS */
91 * User space window operations used for powernv and powerVM
119 * if process / thread has any open VAS window (Use in vas_user_win_add_mm_context()
126 * Receive window attributes specified by the (in-kernel) owner of window.
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/openbmc/linux/arch/powerpc/platforms/cell/
H A Diommu.c125 * - on bus setup, look for a matching window, or create one
162 struct iommu_window *window = in tce_build_cell() local
180 (window->ioid & CBE_IOPTE_IOID_Mask); in tce_build_cell()
183 CBE_IOPTE_SO_RW | (window->ioid & CBE_IOPTE_IOID_Mask); in tce_build_cell()
195 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_build_cell()
207 struct iommu_window *window = in tce_free_cell() local
218 __pa(window->iommu->pad_page) | in tce_free_cell()
219 (window->ioid & CBE_IOPTE_IOID_Mask); in tce_free_cell()
229 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_free_cell()
431 struct iommu_window *window;
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/openbmc/linux/arch/powerpc/platforms/pseries/
H A Diommu.c104 /* Default DMA window table is at index 0, while DDW at 1. SR-IOV in iommu_pseries_free_group()
379 /* Dynamic DMA Window support */
394 /* prevents races between memory on/offline and window creation */
396 /* protects initializing window twice for same device */
620 /* Calculate amount of DMA window per slot. Each window must be in pci_dma_bus_setup_pSeries()
627 /* No ISA/IDE - just set window size and return */ in pci_dma_bus_setup_pSeries()
632 pr_debug("No ISA/IDE, window size is 0x%llx\n", in pci_dma_bus_setup_pSeries()
660 pr_debug("ISA/IDE, window size is 0x%llx\n", pci->phb->dma_window_size); in pci_dma_bus_setup_pSeries()
700 * Find nearest ibm,dma-window (default DMA window) or direct DMA window or
701 * dynamic 64bit DMA window, walking up the device tree.
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H A Dvas.c26 /* The hypervisor allows one credit per window right now */
51 * Allocate VAS window hcall
86 * Deallocate VAS window hcall.
107 * Modify VAS window.
108 * After the window is opened with allocate window hcall, configure it
190 * When the fault interrupt is received for each window, query the
222 * during this window, the hypervisor will not deliver this
240 * Allocate window and setup IRQ mapping.
252 * interrupt per window. So the IRQ setup and fault handling in allocate_setup_window()
253 * will be done for each open window separately. in allocate_setup_window()
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/openbmc/linux/drivers/pci/
H A Dhost-bridge.c55 struct resource_entry *window; in pcibios_resource_to_bus() local
58 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_resource_to_bus()
59 if (resource_contains(window->res, res)) { in pcibios_resource_to_bus()
60 offset = window->offset; in pcibios_resource_to_bus()
80 struct resource_entry *window; in pcibios_bus_to_resource() local
83 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_bus_to_resource()
86 if (resource_type(res) != resource_type(window->res)) in pcibios_bus_to_resource()
89 bus_region.start = window->res->start - window->offset; in pcibios_bus_to_resource()
90 bus_region.end = window->res->end - window->offset; in pcibios_bus_to_resource()
93 offset = window->offset; in pcibios_bus_to_resource()
/openbmc/linux/lib/zstd/compress/
H A Dzstd_compress_internal.h203 ZSTD_window_t window; /* State for window round buffer management */ member
222 …U32 forceNonContiguous; /* Non-zero if we should force non-contiguous load for the next window upd…
254 ZSTD_window_t window; /* State for the window round buffer management */ member
268 U32 windowLog; /* Window log for the LDM */
863 * over a window of length bytes.
896 * Clears the window containing the history by simply setting it to empty.
898 MEM_STATIC void ZSTD_window_clear(ZSTD_window_t* window) in ZSTD_window_clear() argument
900 size_t const endT = (size_t)(window->nextSrc - window->base); in ZSTD_window_clear()
903 window->lowLimit = end; in ZSTD_window_clear()
904 window->dictLimit = end; in ZSTD_window_clear()
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/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_86xx.h29 uint lawbar0; /* 0xc08 - Local Access Window 0 Base Address Register */
31 uint lawar0; /* 0xc10 - Local Access Window 0 Attributes Register */
33 uint lawbar1; /* 0xc28 - Local Access Window 1 Base Address Register */
35 uint lawar1; /* 0xc30 - Local Access Window 1 Attributes Register */
37 uint lawbar2; /* 0xc48 - Local Access Window 2 Base Address Register */
39 uint lawar2; /* 0xc50 - Local Access Window 2 Attributes Register */
41 uint lawbar3; /* 0xc68 - Local Access Window 3 Base Address Register */
43 uint lawar3; /* 0xc70 - Local Access Window 3 Attributes Register */
45 uint lawbar4; /* 0xc88 - Local Access Window 4 Base Address Register */
47 uint lawar4; /* 0xc90 - Local Access Window 4 Attributes Register */
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/openbmc/linux/Documentation/powerpc/
H A Dpci_iov_resource_on_powernv.rst59 Each window can be configured to be remapped via a "TCE table" (IOMMU
76 window and sixteen M64 windows. They have different characteristics.
81 - The M32 window:
87 32-bit PCIe accesses. We configure that window at boot from FW and
97 to be assigned to PEs on a segment granularity. For a 2GB window,
100 Now, this is the "main" window we use in Linux today (excluding
119 specify the PE# for the entire window. When segmented, a window
124 there's a defined ordering for which window applies.
129 We configure an M64 window to cover the entire region of address space
188 - M32 window: There's one M32 window, and it is split into 256
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