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/openbmc/qemu/tests/qemu-iotests/tests/
H A Diov-padding.out4 == performing 1024-element vectored requests to image (offset: 4096; length: 524288) ==
18 == performing 1024-element vectored requests to image (offset: 4096; length: 527872) ==
32 == performing 1024-element vectored requests to image (offset: 512; length: 524288) ==
46 == performing 1024-element vectored requests to image (offset: 512; length: 527872) ==
H A Diov-padding5 # vectored I/O from the guest
56 …echo "== performing 1024-element vectored requests to image (offset: $start_offset; length: $lengt…
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,vic.yaml7 title: ARM Vectored Interrupt Controller
13 One or more Vectored Interrupt Controllers (VIC's) can be connected in an
H A Daspeed,ast2400-vic.yaml7 title: Aspeed Vectored Interrupt Controller
H A Dmicrochip,pic32-evic.txt4 The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
/openbmc/linux/include/uapi/linux/
H A Dnvme_ioctl.h59 __u32 data_len; /* for non-vectored io */
60 __u32 vec_cnt; /* for vectored io */
/openbmc/qemu/linux-headers/linux/
H A Dnvme_ioctl.h59 __u32 data_len; /* for non-vectored io */
60 __u32 vec_cnt; /* for vectored io */
/openbmc/linux/arch/mips/include/asm/sgi/
H A Dip22.h31 #define SGINT_LOCAL2 (SGINT_CPU+24) /* 8 local2 vectored irq levels */
32 #define SGINT_LOCAL3 (SGINT_CPU+32) /* 8 local3 vectored irq levels */
/openbmc/qemu/tests/qemu-iotests/
H A D003.out16 == vectored write ==
H A D00363 echo "== vectored write =="
/openbmc/qemu/include/hw/intc/
H A Dimx_avic.h2 * i.MX31 Vectored Interrupt Controller
/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Daspeed,ast2400-cvic.yaml7 title: Aspeed Coprocessor Vectored Interrupt Controller
/openbmc/linux/drivers/sh/intc/
H A Dirqdomain.c18 * intc_irq_domain_evt_xlate() - Generic xlate for vectored IRQs.
/openbmc/qemu/docs/system/arm/
H A Dversatile.rst8 - PL190 Vectored Interrupt Controller
/openbmc/u-boot/arch/m68k/include/asm/
H A Dm5307.h53 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
/openbmc/linux/arch/mips/bcm47xx/
H A Dirq.c90 pr_info("Setting up vectored interrupts\n"); in arch_init_irq()
/openbmc/linux/arch/m68k/coldfire/
H A Damcore.c75 /* Set the dm9000 interrupt to be auto-vectored */ in dm9000_pre_init()
H A Dintc.c94 * Interrupts can be "vectored" on the ColdFire cores that support this old
/openbmc/linux/arch/arm/mach-nomadik/
H A Dcpu-8815.c22 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
/openbmc/linux/arch/mips/kernel/
H A Drtlx-mt.c117 pr_err("APRP RTLX init on non-vectored-interrupt processor\n"); in rtlx_module_init()
/openbmc/linux/drivers/irqchip/
H A Dirq-nvic.c8 * Support for the Nested Vectored Interrupt Controller found on the
/openbmc/linux/arch/m68k/include/asm/
H A Dmcfintc.h31 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
/openbmc/linux/arch/arm/include/asm/
H A Dcp15.h37 #define CR_VE (1 << 24) /* Vectored interrupts */
/openbmc/linux/arch/loongarch/include/asm/
H A Dcpu.h91 #define CPU_FEATURE_VINT 16 /* CPU has vectored interrupts */
/openbmc/linux/arch/ia64/include/asm/
H A Dhw_irq.h25 * 16-255 (vectored external interrupts) are available

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