1*0892f09cSAndrew Jeffery# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*0892f09cSAndrew Jeffery%YAML 1.2 3*0892f09cSAndrew Jeffery--- 4*0892f09cSAndrew Jeffery$id: http://devicetree.org/schemas/misc/aspeed,ast2400-cvic.yaml# 5*0892f09cSAndrew Jeffery$schema: http://devicetree.org/meta-schemas/core.yaml# 6*0892f09cSAndrew Jeffery 7*0892f09cSAndrew Jefferytitle: Aspeed Coprocessor Vectored Interrupt Controller 8*0892f09cSAndrew Jeffery 9*0892f09cSAndrew Jefferymaintainers: 10*0892f09cSAndrew Jeffery - Andrew Jeffery <andrew@codeconstruct.com.au> 11*0892f09cSAndrew Jeffery 12*0892f09cSAndrew Jefferydescription: 13*0892f09cSAndrew Jeffery The Aspeed AST2400 and AST2500 SoCs have a controller that provides interrupts 14*0892f09cSAndrew Jeffery to the ColdFire coprocessor. It's not a normal interrupt controller and it 15*0892f09cSAndrew Jeffery would be rather inconvenient to create an interrupt tree for it, as it 16*0892f09cSAndrew Jeffery somewhat shares some of the same sources as the main ARM interrupt controller 17*0892f09cSAndrew Jeffery but with different numbers. 18*0892f09cSAndrew Jeffery 19*0892f09cSAndrew Jeffery The AST2500 also supports a software generated interrupt. 20*0892f09cSAndrew Jeffery 21*0892f09cSAndrew Jefferyproperties: 22*0892f09cSAndrew Jeffery compatible: 23*0892f09cSAndrew Jeffery items: 24*0892f09cSAndrew Jeffery - enum: 25*0892f09cSAndrew Jeffery - aspeed,ast2400-cvic 26*0892f09cSAndrew Jeffery - aspeed,ast2500-cvic 27*0892f09cSAndrew Jeffery - const: aspeed,cvic 28*0892f09cSAndrew Jeffery 29*0892f09cSAndrew Jeffery reg: 30*0892f09cSAndrew Jeffery maxItems: 1 31*0892f09cSAndrew Jeffery 32*0892f09cSAndrew Jeffery valid-sources: 33*0892f09cSAndrew Jeffery $ref: /schemas/types.yaml#/definitions/uint32-array 34*0892f09cSAndrew Jeffery maxItems: 1 35*0892f09cSAndrew Jeffery description: 36*0892f09cSAndrew Jeffery A bitmap of supported sources for the implementation. 37*0892f09cSAndrew Jeffery 38*0892f09cSAndrew Jeffery copro-sw-interrupts: 39*0892f09cSAndrew Jeffery $ref: /schemas/types.yaml#/definitions/uint32-array 40*0892f09cSAndrew Jeffery minItems: 1 41*0892f09cSAndrew Jeffery maxItems: 32 42*0892f09cSAndrew Jeffery description: 43*0892f09cSAndrew Jeffery A list of interrupt numbers that can be used as software interrupts from 44*0892f09cSAndrew Jeffery the ARM to the coprocessor. 45*0892f09cSAndrew Jeffery 46*0892f09cSAndrew Jefferyrequired: 47*0892f09cSAndrew Jeffery - compatible 48*0892f09cSAndrew Jeffery - reg 49*0892f09cSAndrew Jeffery - valid-sources 50*0892f09cSAndrew Jeffery 51*0892f09cSAndrew JefferyadditionalProperties: false 52*0892f09cSAndrew Jeffery 53*0892f09cSAndrew Jefferyexamples: 54*0892f09cSAndrew Jeffery - | 55*0892f09cSAndrew Jeffery interrupt-controller@1e6c2000 { 56*0892f09cSAndrew Jeffery compatible = "aspeed,ast2500-cvic", "aspeed,cvic"; 57*0892f09cSAndrew Jeffery reg = <0x1e6c2000 0x80>; 58*0892f09cSAndrew Jeffery valid-sources = <0xffffffff>; 59*0892f09cSAndrew Jeffery copro-sw-interrupts = <1>; 60*0892f09cSAndrew Jeffery }; 61