/openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
H A D | marvell,armada-cp110-pinctrl.txt | 79 5 MSS_UART_TXD UART1_RTS PCIe1_CLKREQ 117 43 MSS_UART_RXD SPI0_CSn[0] UART1_RTS 120 46 - - UART1_RTS
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap3-zoom3.dts | 88 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
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H A D | omap3-evm-common.dtsi | 136 /* gpio_149 with uart1_rts pad as wakeirq */
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H A D | omap3-lilly-a83x.dtsi | 82 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
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H A D | omap4-var-om44customboard.dtsi | 66 OMAP4_IOPAD(0x13e, PIN_OUTPUT | MUX_MODE1) /* mcspi1_cs3.uart1_rts */
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H A D | omap3-evm-processor-common.dtsi | 141 OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
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H A D | omap5-board-common.dtsi | 265 OMAP5_IOPAD(0x0a4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */ 266 OMAP5_IOPAD(0x0a6, PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
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/openbmc/linux/drivers/pinctrl/vt8500/ |
H A D | pinctrl-wm8650.c | 201 PINCTRL_PIN(WMT_PIN_UART1RTS, "uart1_rts"), 296 "uart1_rts",
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H A D | pinctrl-wm8750.c | 217 PINCTRL_PIN(WMT_PIN_UART1_RTS, "uart1_rts"), 324 "uart1_rts",
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H A D | pinctrl-wm8850.c | 214 PINCTRL_PIN(WMT_PIN_UART1_RTS, "uart1_rts"), 314 "uart1_rts",
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H A D | pinctrl-vt8500.c | 185 PINCTRL_PIN(WMT_PIN_UART1RTS, "uart1_rts"), 324 "uart1_rts",
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H A D | pinctrl-wm8505.c | 311 PINCTRL_PIN(WMT_PIN_UART1_RTS, "uart1_rts"), 459 "uart1_rts",
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/openbmc/linux/include/linux/soc/ti/ |
H A D | omap1-mux.h | 55 UART1_RTS, enumerator
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp15xx-dhcom-drc02.dtsi | 128 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
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/openbmc/linux/arch/arm/boot/dts/hisilicon/ |
H A D | hi3620-hi4511.dts | 89 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */ 378 0x214 0 /* UART1_RTS (IOCFG141) */ 388 0x214 0 /* UART1_RTS (IOCFG141) */
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/openbmc/linux/arch/arm/mach-omap1/ |
H A D | board-palmte.c | 237 omap_cfg_reg(UART1_RTS); in omap_palmte_init()
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H A D | board-sx1.c | 327 omap_cfg_reg(UART1_RTS); in omap_sx1_init()
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/openbmc/u-boot/arch/arm/dts/ |
H A D | omap3-evm-processor-common.dtsi | 133 OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
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/openbmc/u-boot/arch/arm/include/asm/arch-omap5/ |
H A D | mux_omap5.h | 116 #define UART1_RTS 0x00a6 macro
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/openbmc/u-boot/board/logicpd/omap3som/ |
H A D | omap3logic.h | 142 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); /*UART1_RTS*/ in set_muxconf_regs()
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | mediatek,mt7622-pinctrl.yaml | 290 UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD,
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H A D | mediatek,mt7986-pinctrl.yaml | 281 UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, UART2_RTS,
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/openbmc/linux/drivers/pinctrl/intel/ |
H A D | pinctrl-denverton.c | 132 PINCTRL_PIN(94, "UART1_RTS"),
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/openbmc/linux/drivers/pinctrl/bcm/ |
H A D | pinctrl-ns.c | 53 { 15, "uart1_rts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
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/openbmc/u-boot/board/BuR/brppt1/ |
H A D | mux.c | 30 /* UART1_RTS as I2C2-SCL */
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