| /openbmc/linux/arch/powerpc/boot/ |
| H A D | pq2.c | 29 u32 *timebase, u32 *brgfreq) in pq2_get_clocks() argument
55 if (timebase) in pq2_get_clocks()
56 *timebase = busclk / 4; in pq2_get_clocks()
75 void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq) in pq2_set_clocks() argument
79 dt_fixup_cpu_clocks(corefreq, timebase, sysfreq); in pq2_set_clocks()
92 u32 sysfreq, corefreq, timebase, brgfreq; in pq2_fixup_clocks() local
94 if (!pq2_get_clocks(crystal, &sysfreq, &corefreq, &timebase, &brgfreq)) in pq2_fixup_clocks()
97 pq2_set_clocks(sysfreq, corefreq, timebase, brgfreq); in pq2_fixup_clocks()
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| H A D | simpleboot.c | 28 const u32 *na, *ns, *reg, *timebase; in platform_init() local
68 /* finally, setup the timebase */ in platform_init()
73 timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size); in platform_init()
74 if (timebase && (size == 4)) in platform_init()
75 timebase_period_ns = 1000000000 / *timebase; in platform_init()
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| H A D | treeboot-currituck.c | 85 const u32 *timebase; in platform_init() local
107 timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size); in platform_init()
108 if (timebase && (size == 4)) in platform_init()
109 timebase_period_ns = 1000000000 / *timebase; in platform_init()
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| H A D | treeboot-akebono.c | 98 const u32 *timebase; in platform_init() local
151 timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size); in platform_init()
152 if (timebase && (size == 4)) in platform_init()
153 timebase_period_ns = 1000000000 / *timebase; in platform_init()
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| H A D | pq2.h | 8 u32 *timebase, u32 *brgfreq);
9 void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq);
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| /openbmc/linux/arch/powerpc/platforms/powermac/ |
| H A D | smp.c | 67 static u64 timebase; variable
298 /* No sure how timebase sync works on those, let's use SW */ in smp_psurge_probe()
359 * We can't use udelay here because the timebase is now frozen. in smp_psurge_kick_cpu()
366 * Also, because the timebase is frozen, we must not return to the in smp_psurge_kick_cpu()
384 timebase = get_tb(); in smp_psurge_kick_cpu()
386 while (timebase) in smp_psurge_kick_cpu()
423 while (!timebase) in smp_psurge_take_timebase()
426 set_tb(timebase >> 32, timebase & 0xffffffff); in smp_psurge_take_timebase()
427 timebase = 0; in smp_psurge_take_timebase()
466 timebase = get_tb(); in smp_core99_give_timebase()
[all …]
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| /openbmc/linux/drivers/pwm/ |
| H A D | pwm-img.c | 43 * PWM period is specified with a timebase register,
45 * specified in step periods, in the [0, $timebase] range.
46 * In other words, the timebase imposes the duty cycle
47 * resolution. Therefore, let's constraint the timebase to
49 * Imposing a minimum timebase, will impose a maximum PWM frequency.
94 u32 val, div, duty, timebase; in img_pwm_config() local
112 timebase = DIV_ROUND_UP(mul, 1); in img_pwm_config()
115 timebase = DIV_ROUND_UP(mul, 8); in img_pwm_config()
118 timebase = DIV_ROUND_UP(mul, 64); in img_pwm_config()
121 timebase = DIV_ROUND_UP(mul, 512); in img_pwm_config()
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | xlnx,xps-timebase-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml#
14 The Timebase watchdog timer(WDT) is a free-running 32 bit counter.
27 - xlnx,xps-timebase-wdt-1.01.a
28 - xlnx,xps-timebase-wdt-1.00.a
61 compatible = "xlnx,xps-timebase-wdt-1.00.a";
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| /openbmc/linux/arch/powerpc/platforms/85xx/ |
| H A D | smp.c | 43 static u64 timebase; variable
62 * that will reread the timebase until TBL is non-zero. in mpc85xx_give_timebase()
63 * That would be a bad thing when the timebase is frozen. in mpc85xx_give_timebase()
73 asm volatile("mfspr %0, %1" : "=r" (timebase) : in mpc85xx_give_timebase()
77 prev = timebase; in mpc85xx_give_timebase()
78 asm volatile("mfspr %0, %1" : "=r" (timebase) : in mpc85xx_give_timebase()
80 } while (prev != timebase); in mpc85xx_give_timebase()
83 timebase = get_tb(); in mpc85xx_give_timebase()
107 set_tb(timebase >> 32, timebase & 0xffffffff); in mpc85xx_take_timebase()
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | vdso_datapage.h | 63 __u64 tb_orig_stamp; /* (NU) Timebase at boot 0x30 */
64 __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */
67 __u64 tb_update_count; /* (NU) Timebase atomicity ctr 0x50 */
94 __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */
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| H A D | imc-pmu.h | 64 * DW 0 : Timebase
71 * DW 7 : Timebase
97 * Macro to mask bits 0:21 of first double word(which is the timebase) to
98 * compare with 8th double word (timebase) of trace imc record data.
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| H A D | time.h | 18 #include <asm/vdso/timebase.h>
32 /* Some sane defaults: 125 MHz timebase, 1GHz processor */
114 /* Convert timebase ticks to nanoseconds */
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| /openbmc/linux/arch/powerpc/kvm/ |
| H A D | book3s_hv_ras.c | 153 * the timebase or do any of the complicated dance that the P7/8 in kvmppc_p9_realmode_hmi_handler()
245 * Timebase (TB) error. If this HMI is due to TB error, then TB would
247 * restore the TB value with host timebase value. For HMI caused due
252 * about the content of TB register whether it holds guest or host timebase
255 * restore TB to host timebase.
304 * Returns 1 if the timebase offset should be applied, 0 if not.
371 * to subtract the previous timebase offset from the timebase. in kvmppc_realmode_hmi_handler()
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| H A D | emulate.c | 46 * The decrementer ticks at the same rate as the timebase, so in kvmppc_emulate_dec()
53 * Guest timebase ticks at the same frequency as host timebase. in kvmppc_emulate_dec()
54 * So use the host timebase calculations for decrementer emulation. in kvmppc_emulate_dec()
88 /* XXX We need to context-switch the timebase for in kvmppc_emulate_mtspr()
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| /openbmc/u-boot/arch/m68k/lib/ |
| H A D | time.c | 45 /* Set up TIMER 3 as timebase clock */ in __udelay()
130 /* Set up TIMER 3 as timebase clock */ in __udelay()
175 * This function is derived from PowerPC code (read timebase as long long).
189 * This function is derived from PowerPC code (timebase clock frequency).
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | iss4xx-mpic.dts | 39 timebase-frequency = <100000000>;
53 timebase-frequency = <100000000>;
69 timebase-frequency = <100000000>;
85 timebase-frequency = <100000000>;
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| H A D | ps3.dts | 33 * dtc expects a clock-frequency and timebase-frequency entries, so
51 timebase-frequency = <0>;
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| /openbmc/u-boot/drivers/cpu/ |
| H A D | riscv_cpu.c | 68 ret = dev_read_u32(dev, "timebase-frequency", &plat->timebase_freq); in riscv_cpu_bind()
71 dev_read_u32(dev->parent, "timebase-frequency", in riscv_cpu_bind()
78 * Pass the "timebase-frequency" value as the driver data for the in riscv_cpu_bind()
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| /openbmc/linux/arch/powerpc/platforms/pasemi/ |
| H A D | setup.c | 102 static unsigned long timebase; variable
113 timebase = get_tb(); in pas_give_timebase()
116 while (timebase) in pas_give_timebase()
124 while (!timebase) in pas_take_timebase()
128 set_tb(timebase >> 32, timebase & 0xffffffff); in pas_take_timebase()
129 timebase = 0; in pas_take_timebase()
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| /openbmc/linux/drivers/platform/chrome/ |
| H A D | cros_ec_sensorhub_ring.c | 169 * we have to calculate it's timestamp in the AP timebase. There are 3 time
171 * a - EC timebase, sensor event
172 * b - EC timebase, IRQ
173 * c - AP timebase, IRQ
174 * a' - what we want: sensor even in AP timebase
218 * @b: IRQ timestamp, EC timebase (us)
219 * @c: IRQ timestamp, AP timebase (ns)
301 * cros_ec_sensor_ring_ts_filter() - Translate EC timebase timestamp to AP
302 * timebase
307 * cros_ec_sensor_ring_ts_filter(a) => a' event timestamp, AP timebase
[all …]
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| /openbmc/linux/arch/powerpc/platforms/8xx/ |
| H A D | m8xx_setup.c | 45 /* The cpu node should have timebase and clock frequency properties */ in get_freq()
87 /* Perform some more timer/timebase initialization. This used in mpc8xx_calibrate_decr()
115 /* Enabling the decrementer also enables the timebase interrupts in mpc8xx_calibrate_decr()
117 * we have to enable the timebase). The decrementer interrupt in mpc8xx_calibrate_decr()
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| /openbmc/linux/arch/powerpc/kernel/ |
| H A D | time.c | 20 * - improve precision and reproducibility of timebase frequency
82 .name = "timebase",
155 * or if that doesn't exist return the timebase value passed in.
189 * and user time (udelta) values obtained from the timebase in vtime_delta_scaled()
632 * timebase into the VTB when it takes a guest off the CPU, reading the in running_clock()
658 /* The cpu node should have timebase and clock frequency properties */ in get_freq()
697 if (!get_freq("ibm,extended-timebase-frequency", 2, &ppc_tb_freq) && in generic_calibrate_decr()
698 !get_freq("timebase-frequency", 1, &ppc_tb_freq)) { in generic_calibrate_decr()
889 /* Normal PowerPC with timebase register */ in time_init()
907 * which is the timebase frequency. in time_init()
[all …]
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| /openbmc/linux/arch/riscv/kernel/ |
| H A D | time.c | 28 if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) in time_init()
29 panic("RISC-V system with no 'timebase-frequency' in DTS\n"); in time_init()
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| /openbmc/u-boot/arch/arm/cpu/sa1100/ |
| H A D | timer.c | 49 * This function is derived from PowerPC code (read timebase as long long).
58 * This function is derived from PowerPC code (timebase clock frequency).
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| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | mpc8641si-pre.dtsi | 37 timebase-frequency = <0>;
49 timebase-frequency = <0>;
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