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/openbmc/linux/Documentation/devicetree/bindings/nvmem/
H A Dsnvs-lpgpr.yaml4 $id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml#
17 - fsl,imx8mm-snvs-lpgpr
18 - fsl,imx8mn-snvs-lpgpr
19 - fsl,imx8mp-snvs-lpgpr
20 - fsl,imx8mq-snvs-lpgpr
21 - const: fsl,imx7d-snvs-lpgpr
23 - fsl,imx6q-snvs-lpgpr
24 - fsl,imx6ul-snvs-lpgpr
25 - fsl,imx7d-snvs-lpgpr
34 snvs@20cc000 {
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/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Dfsl,sec-v4.0-mon.yaml8 title: Freescale Secure Non-Volatile Storage (SNVS)
16 Node defines address range and the associated interrupt for the SNVS function.
43 snvs-rtc-lp:
47 Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
57 const: snvs-rtc
78 snvs-powerkey:
82 The snvs-pwrkey is designed to enable POWER key function which controlled
83 by SNVS ONOFF, the driver can report the status of POWER key and wakeup
94 const: snvs-pwrkey
119 snvs-lpgpr:
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/openbmc/linux/drivers/input/keyboard/
H A Dsnvs_pwrkey.c3 // Driver for the IMX SNVS ON/OFF Power Key
35 struct regmap *snvs; member
51 regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); in imx_imx_snvs_check_for_events()
78 regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); in imx_snvs_pwrkey_interrupt()
98 regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); in imx_snvs_pwrkey_interrupt()
124 /* Get SNVS register Page */ in imx_snvs_pwrkey_probe()
133 pdata->snvs = syscon_regmap_lookup_by_phandle(np, "regmap"); in imx_snvs_pwrkey_probe()
134 if (IS_ERR(pdata->snvs)) { in imx_snvs_pwrkey_probe()
135 dev_err(&pdev->dev, "Can't get snvs syscon\n"); in imx_snvs_pwrkey_probe()
136 return PTR_ERR(pdata->snvs); in imx_snvs_pwrkey_probe()
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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71847-pmic.yaml45 # states. States are called as SNVS and READY. At READY state all the PMIC
46 # power outputs go down and OTP is reload. At the SNVS state all other logic
47 # and external devices apart from the SNVS power domain are shut off. Please
48 # refer to NXP i.MX8 documentation for further information regarding SNVS
49 # state. When a reset is done via SNVS state the PMIC OTP data is not reload.
51 # reset has switched power state to SNVS. If reset is done via READY state the
53 # target state is set to READY by default. If SNVS state is used the boot
57 rohm,reset-snvs-powered:
59 Transfer PMIC to SNVS state at reset.
144 rohm,reset-snvs-powered;
H A Drohm,bd71837-pmic.yaml45 # are called as SNVS and READY. At READY state all the PMIC power outputs go
46 # down and OTP is reload. At the SNVS state all other logic and external
47 # devices apart from the SNVS power domain are shut off. Please refer to NXP
48 # i.MX8 documentation for further information regarding SNVS state. When a
49 # reset is done via SNVS state the PMIC OTP data is not reload. This causes
51 # switched power state to SNVS. If reset is done via READY state the power
53 # target state is set to READY by default. If SNVS state is used the boot
57 rohm,reset-snvs-powered:
59 Transfer PMIC to SNVS state at reset
141 rohm,reset-snvs-powered;
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Drohm,bd71815-regulator.yaml63 rohm,dvs-snvs-voltage:
65 Whether to keep regulator enabled at "SNVS" state or not.
66 0 means regulator should be disabled at SNVS state, non zero voltage
68 when PMIC transitions to SNVS.SNVS voltage depends on the previous
69 state (from which the PMIC transitioned to SNVS).
106 # for each of the HW states (RUN/SNVS/SUSPEND/LPSR). HW defaults can
/openbmc/u-boot/arch/arm/dts/
H A Dimx6ull-colibri.dts492 pinctrl_snvs_gpio1: snvs-gpio1-grp {
502 pinctrl_snvs_gpio2: snvs-gpio2-grp { /* ATMEL MXT TOUCH */
508 pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */
514 pinctrl_snvs_ad7879_int: snvs-ad7879-int { /* TOUCH Interrupt */
520 pinctrl_snvs_reg_sd: snvs-reg-sd-grp {
526 pinctrl_snvs_usbc_det: snvs-usbc-det-grp {
532 pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp {
538 pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp {
544 pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {
H A Dimx6sll.dtsi554 snvs: snvs@020cc000 { label
558 snvs_rtc: snvs-rtc-lp {
560 regmap = <&snvs>;
565 snvs_poweroff: snvs-poweroff {
567 regmap = <&snvs>;
572 snvs_pwrkey: snvs-powerkey {
574 regmap = <&snvs>;
830 snvs_gpr: snvs-gpr@0x021c4000 {
831 compatible = "fsl, imx6sll-snvs-gpr";
835 iomuxc_snvs: iomuxc-snvs@021c8000 {
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H A Dimx6ull.dtsi14 #include "imx6ull-pinfunc-snvs.h"
553 snvslp: snvs@020b0000 {
554 compatible = "fsl,imx6ul-snvs";
695 snvs: snvs@020cc000 { label
699 snvs_rtc: snvs-rtc-lp {
701 regmap = <&snvs>;
706 snvs_poweroff: snvs-poweroff {
708 regmap = <&snvs>;
713 snvs_pwrkey: snvs-powerkey {
715 regmap = <&snvs>;
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H A Dimx6ul.dtsi595 snvs: snvs@020cc000 { label
599 snvs_rtc: snvs-rtc-lp {
601 regmap = <&snvs>;
607 snvs_poweroff: snvs-poweroff {
609 regmap = <&snvs>;
615 snvs_pwrkey: snvs-powerkey {
617 regmap = <&snvs>;
H A Dimx7ulp.dtsi183 snvs: snvs@40230000 { label
187 snvs_rtc: snvs-rtc-lp{
189 regmap =<&snvs>;
192 clock-names = "snvs-rtc";
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ull-dhcom-som.dtsi588 pinctrl_snvs_dhcom_a: snvs-dhcom-a-grp {
592 pinctrl_snvs_dhcom_b: snvs-dhcom-b-grp {
596 pinctrl_snvs_dhcom_c: snvs-dhcom-c-grp {
600 pinctrl_snvs_dhcom_d: snvs-dhcom-d-grp {
604 pinctrl_snvs_dhcom_e: snvs-dhcom-e-grp {
608 pinctrl_snvs_dhcom_f: snvs-dhcom-f-grp {
612 pinctrl_snvs_dhcom_g: snvs-dhcom-g-grp {
616 pinctrl_snvs_dhcom_h: snvs-dhcom-h-grp {
620 pinctrl_snvs_fec1_phy: snvs-fec1-phy-grp {
626 pinctrl_snvs_fec2_phy: snvs-fec2-phy-grp {
H A Dimx6ull.dtsi7 #include "imx6ull-pinfunc-snvs.h"
78 iomuxc_snvs: iomuxc-snvs@2290000 {
79 compatible = "fsl,imx6ull-iomuxc-snvs";
H A Dimx6sll.dtsi559 snvs: snvs@20cc000 { label
563 snvs_rtc: snvs-rtc-lp {
565 regmap = <&snvs>;
571 snvs_poweroff: snvs-poweroff {
573 regmap = <&snvs>;
579 snvs_pwrkey: snvs-powerkey {
581 regmap = <&snvs>;
H A Dimx6ul.dtsi662 snvs: snvs@20cc000 { label
666 snvs_rtc: snvs-rtc-lp {
668 regmap = <&snvs>;
674 snvs_poweroff: snvs-poweroff {
676 regmap = <&snvs>;
683 snvs_pwrkey: snvs-powerkey {
685 regmap = <&snvs>;
692 snvs_lpgpr: snvs-lpgpr {
693 compatible = "fsl,imx6ul-snvs-lpgpr";
H A Dimx6ull-dhcor-maveo-box.dts334 pinctrl_snvs_hog_maveo_box: snvs-hog-maveo-box-grp {
347 pinctrl_snvs_wifi_gpio: snvs-wifi-gpio-grp {
353 pinctrl_snvs_zigbee_gpio: snvs-zigbee-gpio-grp {
/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dsnvs.c17 /* Ensure SNVS HPCOMR sets NPSWA_EN to allow unpriv access to SNVS LP */ in init_snvs()
/openbmc/qemu/include/hw/misc/
H A Dimx7_snvs.h4 * i.MX7 SNVS block emulation code
28 #define TYPE_IMX7_SNVS "imx7.snvs"
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx6ul-pinctrl.txt8 "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.
/openbmc/linux/drivers/nvmem/
H A Dsnvs_lpgpr.c138 { .compatible = "fsl,imx6q-snvs-lpgpr", .data = &snvs_lpgpr_cfg_imx6q },
139 { .compatible = "fsl,imx6ul-snvs-lpgpr",
141 { .compatible = "fsl,imx7d-snvs-lpgpr", .data = &snvs_lpgpr_cfg_imx7d },
/openbmc/u-boot/drivers/pinctrl/nxp/
H A Dpinctrl-imx6.c36 { .compatible = "fsl,imx6sll-iomuxc-snvs", .data = (ulong)&imx6_snvs_pinctrl_soc_info },
40 { .compatible = "fsl,imx6ull-iomuxc-snvs", .data = (ulong)&imx6_snvs_pinctrl_soc_info },
/openbmc/linux/drivers/rtc/
H A Drtc-snvs.c334 dev_warn(&pdev->dev, "snvs rtc: you use old dts file, please update it\n"); in snvs_rtc_probe()
347 dev_err(&pdev->dev, "Can't find snvs syscon\n"); in snvs_rtc_probe()
355 data->clk = devm_clk_get(&pdev->dev, "snvs-rtc"); in snvs_rtc_probe()
362 "Could not prepare or enable the snvs clock\n"); in snvs_rtc_probe()
445 MODULE_DESCRIPTION("Freescale SNVS RTC Driver");
/openbmc/qemu/hw/arm/
H A Dfsl-imx7.c132 * SNVS in fsl_imx7_init()
134 object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS); in fsl_imx7_init()
489 * SNVS in fsl_imx7_realize()
491 sysbus_realize(SYS_BUS_DEVICE(&s->snvs), &error_abort); in fsl_imx7_realize()
492 sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, FSL_IMX7_SNVS_HP_ADDR); in fsl_imx7_realize()
H A Dfsl-imx6ul.c63 * SNVS in fsl_imx6ul_init()
65 object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS); in fsl_imx6ul_init()
555 * SNVS in fsl_imx6ul_realize()
557 sysbus_realize(SYS_BUS_DEVICE(&s->snvs), &error_abort); in fsl_imx6ul_realize()
558 sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, FSL_IMX6UL_SNVS_HP_ADDR); in fsl_imx6ul_realize()
H A Dfsl-imx6.c58 object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS); in fsl_imx6_init()
404 * SNVS in fsl_imx6_realize()
406 sysbus_realize(SYS_BUS_DEVICE(&s->snvs), &error_abort); in fsl_imx6_realize()
407 sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, FSL_IMX6_SNVSHP_ADDR); in fsl_imx6_realize()

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