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Searched full:refreshes (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/board/freescale/mx6memcal/
H A DKconfig214 int "Number of refreshes"
218 This selects the number of refreshes (-1) during each period.
221 7 == 8 refreshes (tRFC*8)
/openbmc/webui-vue/docs/guide/components/toasts/
H A Dindex.md50 `refreshAction` property, set to true, to include a link that refreshes the
/openbmc/docs/designs/
H A Dcertificate-revocation-list.md83 it not only refreshes authority and server certificates, but also CRLs. Example
/openbmc/u-boot/board/tbs/tbs2910/
H A Dtbs2910.cfg107 /* configure and start refreshes, 8 refresh commands at 32 kHz */
/openbmc/phosphor-dbus-interfaces/yaml/org/freedesktop/UPower/
H A DDevice.interface.yaml12 "Refreshes the data collected from the power source. Callers need the
/openbmc/u-boot/Documentation/devicetree/bindings/ram/
H A Dfsl,mpc83xx-mem-controller.txt196 - posted_refreshes: Number of posted refreshes
/openbmc/u-boot/drivers/ram/
H A Dk3-am654-ddrss.c172 /* Disable refreshes */ in am654_ddrss_ctrl_configuration()
576 /* Enabling refreshes after training is done */ in am654_ddrss_init()
/openbmc/phosphor-fan-presence/monitor/
H A Dtach_sensor.hpp363 * @brief Refreshes the tach input and target values by
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dddr.c307 * Disable initialization and refreshes for now until we finish in config_ddr_phy()
/openbmc/u-boot/arch/arm/mach-omap2/
H A Demif-common.c324 /* Enable refreshes after leveling */ in dra7_ddr3_leveling()
/openbmc/qemu/include/block/
H A Dblock_int-common.h267 * Refreshes the bs->exact_filename field. If that is impossible,
/openbmc/u-boot/drivers/ddr/fsl/
H A Dctrl_regs.c880 unsigned int num_pr; /* Number of posted refreshes */ in set_ddr_sdram_cfg_2()