| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/ |
| H A D | Dimm.interface.yaml | 4 - name: MemoryDataWidth
8 - name: MemorySizeInKB
12 - name: MemoryDeviceLocator
16 - name: MemoryType
20 - name: MemoryTypeDetail
24 - name: MaxMemorySpeedInMhz
28 - name: MemoryAttributes
33 - name: MemoryConfiguredSpeedInMhz
37 - name: ECC
40 Error-Correcting Code.
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| /openbmc/openbmc-test-automation/ipmi/ |
| H A D | test_ipmi_user.robot | 48 ${random_userid} ${random_username}= Create Random IPMI User
67 ${random_userid} ${random_username}= Create Random IPMI User
76 Set Channel Access ${random_userid} ipmi=on privilege=${admin_level_priv}
78 ${users_access}= Get User Access Ipmi ${CHANNEL_NUMBER}
81 ${index}= Evaluate ${random_userid} - 1
82 # Verify the user access of created user.
97 ${random_userid} ${random_username}= Create Random IPMI User
118 ${random_invalid_id}= Evaluate random.randint(16, 1000) modules=random
136 ${random_userid} ${random_username}= Create Random IPMI User
167 ${random_userid} ${random_username}= Create Random IPMI User
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| H A D | test_ipmi_payload.robot | 93 Verify Set User Access Payload For Standard Payload SOL
96 [Teardown] Run Keywords Set User Access Payload For Given User ${user_id_in_hex}
104 # Get default user access payload values.
105 …${default_user_access_payload}= Get User Access Payload For Given Channel ${userid_in_hex_format}
107 # Disable Standard payload 1 via set user access payload command.
108 Set User Access Payload For Given User ${user_id_in_hex} Disable
113 Verify Set User Access Payload For Operator Privileged User
114 [Documentation] Try to set user access payload using operator privileged user and expect error.
127 Verify Set User Access Payload For Invalid User
128 [Documentation] Verify set user access payload IPMI command for invalid user.
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| /openbmc/openbmc-test-automation/gui/gui_test/security_and_access_menu/ |
| H A D | test_user_management_sub_menu.robot | 3 Documentation Test OpenBMC GUI "User management" sub-menu of "Security and access".
17 ${xpath_select_user} //input[contains(@class,"custom-control-input")]
20 ${xpath_edit_user} //*[@data-test-id='userManagement-tableRowAction-edit-0']
21 ${xpath_delete_user} //*[@data-test-id='userManagement-tableRowAction-delete-1']
22 ${xpath_account_status_enabled_button} //*[@data-test-id='userManagement-radioButton-statusEnable…
23 ${xpath_account_status_disabled_button} //*[@data-test-id='userManagement-radioButton-statusDisabl…
24 ${xpath_username_input_button} //*[@data-test-id='userManagement-input-username']
25 ${xpath_privilege_list_button} //*[@data-test-id='userManagement-select-privilege']
26 ${xpath_password_input_button} //*[@data-test-id='userManagement-input-password']
27 ${xpath_password_confirm_button} //*[@data-test-id='userManagement-input-passwordConfirmati…
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| /openbmc/openbmc/meta-openembedded/meta-perl/recipes-perl/libcrypt/ |
| H A D | libcrypt-openssl-random-perl_0.17.bb | 1 SUMMARY = "Crypt::OpenSSL::Random - OpenSSL/LibreSSL pseudo-random number generator access"
3 HOMEPAGE = "https://metacpan.org/pod/Crypt::OpenSSL::Random"
4 LICENSE = "Artistic-1.0 | GPL-1.0-or-later"
8 SRC_URI = "${CPAN_MIRROR}/authors/id/R/RU/RURBAN/Crypt-OpenSSL-Random-${PV}.tar.gz"
11 S = "${WORKDIR}/Crypt-OpenSSL-Random-${PV}"
15 libcrypt-openssl-guess-perl-native \
18 EXTRA_CPANFLAGS = "INC='-I${STAGING_INCDIR}' LIBS='-L${STAGING_LIBDIR} -L${STAGING_BASELIBDIR} -lcr…
20 inherit cpan ptest-perl
23 perl-module-exporter \
24 perl-module-strict \
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| /openbmc/linux/arch/x86/tools/ |
| H A D | insn_sanity.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * x86 decoder sanity test - based on test_get_insn.c
23 * Feed random binary to instruction decoder and ensure not to
24 * access out-of-instruction-buffer.
32 static int x86_64; /* x86-64 bit mode flag */
33 static unsigned int seed; /* Random seed */
42 fprintf(stderr, "Usage: %s [-y|-n|-v] [-s seed[,no]] [-m max] [-i input]\n", prog); in usage()
43 fprintf(stderr, "\t-y 64bit mode\n"); in usage()
44 fprintf(stderr, "\t-n 32bit mode\n"); in usage()
45 fprintf(stderr, "\t-v Verbosity(-vv dumps any decoded result)\n"); in usage()
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| /openbmc/qemu/docs/system/ |
| H A D | secrets.rst | 4 -----------------------------
9 unlock key material, remote desktop services require an access password.
13 At startup this can be done using the ``-object secret,...`` command line
15 monitor commands. The examples that follow will illustrate use of ``-object``
25 multi-user host. Command line arguments are usually visible in the process
36 -object secret,id=secvnc0,data=87539319
45 -object secret,id=secvnc0,data=ODc1MzkzMTk=,format=base64
58 -object secret,id=secvnc0,file=vnc-password.txt
61 In this example the file ``vnc-password.txt`` contains the plain text secret
72 -object secret,id=sec0,file=vnc-password.txt,format=base64
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| /openbmc/libcper/generator/sections/ |
| H A D | gen-section-dmar.c | 2 * Functions for generating pseudo-random CPER DMAr error sections.
9 #include <libcper/generator/gen-utils.h>
10 #include <libcper/generator/sections/gen-section.h>
12 //Generates a single pseudo-random generic DMAr error section, saving the resulting address to the …
18 //Create random bytes. in generate_section_dmar_generic()
29 *(bytes + 5) = rand() % 2; //Access type. in generate_section_dmar_generic()
38 //Generates a single pseudo-random VT-d DMAr error section, saving the resulting address to the giv…
44 //Create random bytes. in generate_section_dmar_vtd()
50 *(bytes + 36 + i) = 0; //Reserved bytes 36-47. in generate_section_dmar_vtd()
56 *reserved &= ~0x1FFF0000; //Bits 80-92 of fault record. in generate_section_dmar_vtd()
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| /openbmc/linux/Documentation/admin-guide/ |
| H A D | hw_random.rst | 2 Hardware random number generators
10 a Random Number Generator (RNG). The software has two parts:
12 sysfs support, plus a hardware-specific driver that plugs
17 latest version of the "rng-tools" package from the
24 /dev/random special files.
30 and read() system calls, you can read random data from
34 output if the hardware "has-data" flag is set, but nevertheless
35 a security-conscious person would run fitness tests on the
36 data before assuming it is truly random.
38 The rng-tools package uses such tests in "rngd", and lets you
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| /openbmc/linux/Documentation/block/ |
| H A D | blk-mq.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Multi-Queue Block IO Queueing Mechanism (blk-mq)
7 The Multi-Queue Block IO Queueing Mechanism is an API to enable fast storage
16 ----------
20 performance possible for those devices with a high penalty when doing random
21 access, and the bottleneck was the mechanical moving parts, a lot slower than
26 However, with the development of Solid State Drives and Non-Volatile Memories
27 without mechanical parts nor random access penalty and capable of performing
28 high parallel access, the bottleneck of the stack had moved from the storage
30 in those devices' design, the multi-queue mechanism was introduced.
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| /openbmc/linux/security/keys/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "Enable access key retention support"
11 access keys in the kernel.
18 a searchable sequence of keys. Each process is equipped with access
19 to five standard keyrings: UID-specific, GID-specific, session,
43 bool "Enable register of persistent per-UID keyrings"
46 This option provides a register of persistent per-UID keyrings,
53 LSMs gets to rule on which admin-level processes get to access the
76 keys in the kernel. Trusted keys are random number symmetric keys,
77 generated and sealed by a trust source selected at kernel boot-time.
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| /openbmc/linux/Documentation/devicetree/bindings/power/reset/ |
| H A D | keystone-reset.txt | 14 - compatible: ti,keystone-reset
16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to
17 access pll controller registers and the offset to use
20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
21 access device state control registers and the offset
26 - ti,soft-reset: Boolean option indicating soft reset.
29 - ti,wdt-list: WDT list that can cause SoC reset. It's not related
32 in format: <0>, <2>; It can be in random order and
34 reset watchdogs and can be in random order.
40 pllctrl: pll-controller@2310000 {
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| /openbmc/linux/drivers/net/wireless/ath/ath9k/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: ISC
55 Say Y, if you have a SoC with a compatible built-in
64 Say Y, if you need access to ath9k's statistics for
140 Say Y to have ath9k poll the RF-Kill GPIO every couple of
142 a platform that can toggle the RF-Kill GPIO.
150 for multi-channel concurrency. Enable this if P2P PowerSave support
159 tristate "Atheros ath9k pci loader for EEPROM-less chips"
164 AR500X to AR92XX-generation of ath9k PCI(e) WiFi chips, which have
170 access Points and such.
194 Say Y, if you need access to ath9k_htc's statistics.
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| /openbmc/linux/crypto/ |
| H A D | jitterentropy.c | 2 * Non-physical true random number generator based on timing jitter --
5 * Copyright Stephan Mueller <smueller@chronox.de>, 2015 - 2023
32 * the restrictions contained in a BSD-style copyright.)
54 …error "The CPU Jitter random number generator must not be compiled with optimizations. See documen…
65 /* SHA3-256 is used as conditioner */
69 * access that information while the RNG executes its loops to
70 * calculate the next random value. */
80 unsigned char *mem; /* Memory access location with size of
85 unsigned int memaccessloops; /* Number of memory accesses per random
91 /* Intermittent health test failure threshold of 2^-30 */
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| /openbmc/linux/drivers/iio/dummy/ |
| H A D | iio_simple_dummy_buffer.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 [DUMMY_INDEX_DIFFVOLTAGE_1M2] = -33,
30 [DUMMY_INDEX_DIFFVOLTAGE_3M4] = -2,
35 * iio_simple_dummy_trigger_h() - the trigger handler function
37 * @p: private data - always a pointer to the poll func.
47 struct iio_dev *indio_dev = pf->indio_dev; in iio_simple_dummy_trigger_h()
51 data = kzalloc(indio_dev->scan_bytes, GFP_KERNEL); in iio_simple_dummy_trigger_h()
62 * can be considered to be random access so efficient reading is just in iio_simple_dummy_trigger_h()
68 * Here let's pretend we have random access. And the values are in the in iio_simple_dummy_trigger_h()
71 for_each_set_bit(j, indio_dev->active_scan_mask, indio_dev->masklength) in iio_simple_dummy_trigger_h()
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| /openbmc/qemu/tests/tcg/aarch64/system/ |
| H A D | mte.S | 8 * SPDX-License-Identifier: LGPL-2.1-or-later
11 #define addr x0 /* Ptr to the start of the MTE-enabled page. */
12 #define tagged_addr x1 /* 'addr' ptr with a random-generated tag added. */
55 * ATA[43] = 0b1 => Enable access to allocation tags at EL1
67 * MTE-enabled page resides at the 3rd 2MB chunk in the second 1GB
77 * Set GCR for random tag generation. 0xA5 is just a random value to set
98 * Store a random value (0xdeadbeef) to tagged_addr address. This must
101 * set the same, otherwise something is off and the test fails -- an
107 /* This label is used by GDB Python script test-mte.py. */
|
| /openbmc/linux/tools/testing/selftests/bpf/progs/ |
| H A D | dev_cgroup.c | 15 short type = ctx->access_type & 0xFFFF; in bpf_prog1()
17 short access = ctx->access_type >> 16; in bpf_prog1() local
32 if (access & BPF_DEVCG_ACC_READ) in bpf_prog1()
35 if (access & BPF_DEVCG_ACC_WRITE) in bpf_prog1()
38 if (access & BPF_DEVCG_ACC_MKNOD) in bpf_prog1()
41 bpf_trace_printk(fmt, sizeof(fmt), ctx->major, ctx->minor); in bpf_prog1()
44 /* Allow access to /dev/zero and /dev/random. in bpf_prog1()
47 if (ctx->major != 1 || type != BPF_DEVCG_DEV_CHAR) in bpf_prog1()
50 switch (ctx->minor) { in bpf_prog1()
|
| /openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/ |
| H A D | Processor.v1_20_1.json | 4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
34 "description": "The available OEM-specific actions for this resource.",
35 …"longDescription": "This property shall contain the available OEM-specific actions for this resour…
57 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
95 …operties contained in this object shall conform to the Redfish Specification-described requirement…
106 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
177 …operties contained in this object shall conform to the Redfish Specification-described requirement…
214 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
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| /openbmc/bmcweb/redfish-core/schema/dmtf/json-schema-installed/ |
| H A D | Processor.v1_20_1.json | 4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
34 "description": "The available OEM-specific actions for this resource.",
35 …"longDescription": "This property shall contain the available OEM-specific actions for this resour…
57 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
95 …operties contained in this object shall conform to the Redfish Specification-described requirement…
106 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
177 …operties contained in this object shall conform to the Redfish Specification-described requirement…
214 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
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| /openbmc/linux/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| H A D | mac.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
11 * AUX indices follows - 1 for non-CDB, 2 for CDB.
31 * enum iwl_mac_protection_flags - MAC context flags
50 * enum iwl_mac_types - Supported MAC types
54 * @FW_MAC_TYPE_PIBSS: Pseudo-IBSS
78 * enum iwl_tsf_id - TSF hw timer ID
94 * struct iwl_mac_data_ap - configuration data for AP MAC context
117 * struct iwl_mac_data_ibss - configuration data for IBSS MAC context
133 * enum iwl_mac_data_policy - policy of the data path for this MAC
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| /openbmc/phosphor-net-ipmid/command/ |
| H A D | rakp12.cpp | 13 #include <phosphor-logging/lg2.hpp>
45 if (inPayload.size() < (sizeof(*request) - userNameMaxLen)) in RAKP12()
55 if (endian::from_ipmi(request->managedSystemSessionID) == in RAKP12()
59 response->rmcpStatusCode = in RAKP12()
68 endian::from_ipmi(request->managedSystemSessionID)); in RAKP12()
73 response->rmcpStatusCode = in RAKP12()
79 sizeof(RAKP1request) - (userNameMaxLen - request->user_name_len); in RAKP12()
83 if (request->user_name_len > userNameMaxLen || in RAKP12()
86 response->rmcpStatusCode = in RAKP12()
92 session->userName.assign(request->user_name, request->user_name_len); in RAKP12()
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| /openbmc/linux/tools/perf/pmu-events/arch/powerpc/power10/ |
| H A D | marked.json | 60 …n which the marked instruction is the oldest in the pipeline (next-to-finish or next-to-complete)."
65 …"BriefDescription": "An instruction was marked at decode time. Random Instruction Sampling (RIS) o…
110 …on": "An instruction was marked. Includes both Random Instruction Sampling (RIS) at decode time an…
120 …"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 64K for a marked instruction. When…
190 …": "Marked store completed and sent to nest. Note that this count excludes cache-inhibited stores."
200 …"BriefDescription": "Marked Erat Miss (Data TLB Access) All page sizes. When MMCR1[16]=0 this even…
235 …"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 1G for a marked instruction. When …
250 …"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 2M for a marked instruction. When …
|
| /openbmc/linux/arch/mips/kvm/ |
| H A D | stats.c | 6 * KVM/MIPS: COP0 access histogram
16 "Random",
54 kvm_info("\nKVM VCPU[%d] COP0 Access Profile:\n", vcpu->vcpu_id); in kvm_mips_dump_stats()
57 if (vcpu->arch.cop0.stat[i][j]) in kvm_mips_dump_stats()
59 vcpu->arch.cop0.stat[i][j]); in kvm_mips_dump_stats()
|
| /openbmc/linux/arch/x86/coco/ |
| H A D | core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/random.h>
37 * Handle the SEV-SNP vTOM case where sme_me_mask is zero, and
38 * the other levels of SME/SEV functionality, including C-bit
39 * based SEV-SNP, are not enabled.
59 * paging is activated, SME will access all memory as decrypted, but SEV
60 * will access all memory as encrypted. So, when APs are being brought
87 * but SEV-ES supports them through the #VC handler. in amd_cc_platform_has()
123 * - for AMD, bit *set* means the page is encrypted in cc_mkenc()
124 * - for AMD with vTOM and for Intel, *clear* means encrypted in cc_mkenc()
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| /openbmc/linux/tools/testing/selftests/cachestat/ |
| H A D | test_cachestat.c | 1 // SPDX-License-Identifier: GPL-2.0
32 cs->nr_cache, cs->nr_dirty, cs->nr_writeback, in print_cachestat()
33 cs->nr_evicted, cs->nr_recently_evicted); in print_cachestat()
44 ksft_print_msg("Unable to access urandom.\n"); in write_exactly()
68 remained -= read_len; in write_exactly()
72 /* write random data to fd */ in write_exactly()
79 ksft_print_msg("Unable write random data to file.\n"); in write_exactly()
84 remained -= write_len; in write_exactly()
112 * Open/create the file at filename, (optionally) write random data to it
131 if (fd == -1) { in test_cachestat()
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