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/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-tsa.yaml7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
H A Dfsl,cpm1-scc-qmc.yaml7 title: PowerQUICC CPM QUICC Multichannel Controller (QMC)
H A Dqe.txt2 This represents qe module that is installed on PowerQUICC II Pro.
/openbmc/linux/arch/powerpc/platforms/82xx/
H A Dpq2.c3 * Common PowerQUICC II code.
/openbmc/linux/arch/powerpc/platforms/83xx/
H A DKconfig52 also known as ZOOM PowerQUICC Kit.
/openbmc/qemu/target/ppc/
H A Dcpu-models.h96 /* PowerPC MPC 8xx cores (aka PowerQUICC) */
98 /* G2 cores (aka PowerQUICC-II) */
106 /* G2_LE core (aka PowerQUICC-II) */
H A Dcpu-models.c189 /* MPC8xx family (aka PowerQUICC) */
194 /* MPC82xx family (aka PowerQUICC-II) */
775 { "powerquicc", "mpc8xx" },
802 { "powerquicc-ii", "g2legp3" },
H A Dcpu_init.c2523 dc->desc = "Freescale 8xx cores (aka PowerQUICC)"; in POWERPC_FAMILY()
2550 /* Freescale 82xx cores (aka PowerQUICC-II) */
/openbmc/linux/arch/powerpc/boot/
H A Dpq2.c3 * PowerQUICC II support functions
H A Dcuboot-pq2.c3 * Old U-boot compatibility for PowerQUICC II
/openbmc/linux/drivers/net/ethernet/freescale/
H A Dfsl_pq_mdio.c3 * Freescale PowerQUICC Ethernet Driver -- MIIM bus implementation
434 new_bus->name = "Freescale PowerQUICC MII Bus"; in fsl_pq_mdio_probe()
/openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpic.txt6 The Freescale MPIC interrupt controller is found on all PowerQUICC
/openbmc/linux/arch/powerpc/include/asm/
H A Dcputable.h250 * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II
/openbmc/linux/drivers/crypto/
H A DKconfig207 The Freescale SEC is present on PowerQUICC 'E' processors, such