| /openbmc/linux/include/linux/ |
| H A D | lcd.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2003,2004 Hewlett-Packard Company
19 * lcd_device->ops_lock is an internal backlight lock protecting the ops
36 /* The maximum value for contrast (read-only) */
41 /* Get the LCD panel power status (0: full on, 1..3: controller
42 power on, flat panel power off, 4: full off), see FB_BLANK_XXX */
44 /* Enable or disable power to the LCD (0: on; 4: off, see FB_BLANK_XXX) */
45 int (*set_power)(struct lcd_device *, int power);
46 /* Get the current contrast setting (0-max_contrast) */
77 lcd power off and 1, lcd power on. */
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| H A D | clocksource.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/time.h>
35 * struct clocksource - hardware abstraction for a free running counter
36 * Provides mostly state-free accessors to the underlying hardware.
37 * This is the structure used for system time.
43 * @shift: Cycle to nanosecond divisor (power of two)
44 * @max_idle_ns: Maximum idle time permitted by the clocksource (nsecs)
48 * @archdata: Optional arch-specific data
57 * 1-99: Unfit for real use
59 * 100-199: Base level usability.
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| /openbmc/openbmc-test-automation/gui/lib/ |
| H A D | resource.robot | 3 ... user-defined keywords which are available to all gui modules
87 # (e.g. https://openbmc-test.mybluemix.net/#/login).
142 ... Run Keywords Power On OpenBMC AND
145 ... Run Keywords Redfish.Login AND Redfish Power Off AND Redfish.Logout
148 Power On OpenBMC
149 [Documentation] Power on the OBMC system.
151 Log To Console Power On OpenBMC...
154 Wait OpenBMC To Become Stable ${obmc_running_state}
163 Wait OpenBMC To Become Stable ${obmc_off_state}
165 Wait OpenBMC To Become Stable
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| /openbmc/linux/Documentation/devicetree/bindings/arm/tegra/ |
| H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra124/ |
| H A D | cpu.c | 1 // SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch-tegra/clk_rst.h>
15 #include <asm/arch-tegra/pmc.h>
16 #include <asm/arch-tegra/ap.h>
19 /* Tegra124-specific CPU init code */
27 /* un-tristate PWR_I2C SCL/SDA, rest of the defaults are correct */ in enable_cpu_power_rail()
34 * Set CPUPWRGOOD_TIMER - APB clock is 1/2 of SCLK (102MHz), in enable_cpu_power_rail()
37 writel(0x7C830, &pmc->pmc_cpupwrgood_timer); in enable_cpu_power_rail()
40 clrbits_le32(&pmc->pmc_cntrl, CPUPWRREQ_POL); in enable_cpu_power_rail()
41 setbits_le32(&pmc->pmc_cntrl, CPUPWRREQ_OE); in enable_cpu_power_rail()
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| /openbmc/phosphor-webui/ |
| H A D | README.md | 3 phosphor-webui is a Web-based user interface for the OpenBMC firmware stack.
5 [webui-vue repository](https://github.com/openbmc/webui-vue) is a replacement
6 for phosphor-webui.
8 If you haven't switched to webui-vue, it is strongly recommended you do so now.
10 - phosphor-webui uses AngularJS which has gone [End of
12 - phosphor-webui uses the REST D-BUS API which has been [disabled by default in
14 - webui-vue has many additional features not present in phosphor-webui
15 - Very little active development is happening in phosphor-webui and at a later
16 date phosphor-webui will move to ReadOnly
20 - View system overview data such as model information and serial number
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| /openbmc/linux/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| H A D | system.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2019-2021 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
20 * struct iwl_soc_configuration_cmd - Set device stabilization latency
25 * @latency: time for SOC to ensure stable power & XTAL
36 * struct iwl_system_features_control_cmd - system features control command
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| /openbmc/linux/Documentation/w1/slaves/ |
| H A D | w1_ds28e17.rst | 7 * Maxim DS28E17 1-Wire-to-I2C Master Bridge
19 -----------
30 SUBSYSTEM=="i2c-dev", KERNEL=="i2c-[0-9]*", ATTRS{name}=="w1-19-*", \
31 SYMLINK+="i2c-$attr{name}"
33 may be used to create stable /dev/i2c- entries based on the unique id of the
41 it is connected. The power-on default of the DS28E17 is 400kBaud, but
42 chips may come and go on the Onewire bus without being de-powered and
44 reconnected DS28E17 device on the Onewire bus, it will re-apply this
53 wait time for an I2C transfer. This is to account for I2C slave devices
55 needed timeout cannot be pre-calculated correctly. As the w1_ds28e17
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| /openbmc/linux/arch/parisc/kernel/ |
| H A D | firmware.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/parisc/kernel/firmware.c - safe PDC access routines
14 * Copyright 2003 Grant Grundler <grundler parisc-linux org>
15 * Copyright 2003,2004 Ryan Bradetich <rbrad@parisc-linux.org>
16 * Copyright 2004,2006 Thibaut VARENE <varenet@parisc-linux.org>
22 * - the name of the pdc wrapper should match one of the macros
24 * - don't use caps for random parts of the name
25 * - use the static PDC result buffers and "copyout" to structs
27 * - hold pdc_lock while in PDC or using static result buffers
28 * - use __pa() to convert virtual (kernel) pointers to physical
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| /openbmc/linux/Documentation/leds/ |
| H A D | well-known-leds.txt | 1 -*- org -*-
17 Notice there's a list of functions in include/dt-bindings/leds/common.h .
24 player. For example, a game controller with 4 LEDs, may be programmed with "x---"
25 to indicate player 1, "-x--" to indicate player 2 etcetera where "x" means on.
31 Good: "input*:*:player-{1,2,3,4,5}
38 Legacy: "shift-key-light" (Motorola Droid 4, capslock)
47 Legacy: "button-backlight" (Motorola Droid 4)
62 Legacy: "status-led:{red,green,blue}" (Motorola Droid 4)
65 Phones usually have multi-color status LED.
67 * Power management
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra114/ |
| H A D | cpu.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2010-2014
13 #include <asm/arch-tegra/clk_rst.h>
14 #include <asm/arch-tegra/pmc.h>
17 /* Tegra114-specific CPU init code */
26 /* un-tristate PWR_I2C SCL/SDA, rest of the defaults are correct */ in enable_cpu_power_rail()
31 * Set CPUPWRGOOD_TIMER - APB clock is 1/2 of SCLK (102MHz), in enable_cpu_power_rail()
35 writel(reg, &pmc->pmc_cpupwrgood_timer); in enable_cpu_power_rail()
38 clrbits_le32(&pmc->pmc_cntrl, CPUPWRREQ_POL); in enable_cpu_power_rail()
39 setbits_le32(&pmc->pmc_cntrl, CPUPWRREQ_OE); in enable_cpu_power_rail()
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| /openbmc/linux/include/linux/fpga/ |
| H A D | fpga-mgr.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2013-2016 Altera Corporation
18 * enum fpga_mgr_states - fpga framework states
20 * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
21 * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
63 * Flags used in the &fpga_image_info->flags field
82 * struct fpga_image_info - information specific to an FPGA image
84 * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
85 * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
86 * @config_complete_timeout_us: maximum time for FPGA to switch to operating
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| /openbmc/linux/Documentation/driver-api/usb/ |
| H A D | usb.rst | 1 .. _usb-hostside-api:
4 The Linux-USB Host Side API
18 That master/slave asymmetry was designed-in for a number of reasons, one
22 distributed auto-configuration since the pre-designated master node
29 measurement and improved power management introduced.
37 USB Host-Side API Model
40 Host-side drivers for USB devices talk to the "usbcore" APIs. There are
41 two. One is intended for *general-purpose* drivers (exposed through
49 - USB supports four kinds of data transfers (control, bulk, interrupt,
54 - The device description model includes one or more "configurations"
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| /openbmc/linux/Documentation/process/ |
| H A D | 6.Followthrough.rst | 23 ----------------------
31 - If you have explained your patch well, reviewers will understand its
35 Many of the changes you may be asked to make - from coding style tweaks
36 to substantial rewrites - come from the understanding that Linux will
39 - Code review is hard work, and it is a relatively thankless occupation;
47 - Similarly, code reviewers are not trying to promote their employers'
54 - Be prepared for seemingly silly requests for coding style changes
59 kernel feature ready for next time.
64 from happening. When you get review comments on a patch, take the time to
75 agree with the reviewer, take some time to think things over again. It can
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| /openbmc/linux/Documentation/virt/kvm/x86/ |
| H A D | timekeeping.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
23 time introduces a new set of challenges because it introduces a multiplexed
24 division of time beyond the control of the guest CPU.
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
59 -------------- ----------------
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| /openbmc/openbmc/poky/bitbake/doc/bitbake-user-manual/ |
| H A D | bitbake-user-manual-intro.rst | 1 .. SPDX-License-Identifier: CC-BY-2.5
23 working within complex inter-task dependency constraints. One of
25 Linux software stacks using a task-oriented approach.
30 - BitBake executes tasks according to the provided metadata that builds up
37 - BitBake includes a fetcher library for obtaining source code from
41 - The instructions for each unit to be built (e.g. a piece of software)
46 - BitBake includes a client/server abstraction and can be used from a
47 command line or used as a service over XML-RPC and has several
58 - BitBake, a generic task executor
60 - OpenEmbedded, a metadata set utilized by BitBake
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| /openbmc/linux/drivers/gpu/drm/pl111/ |
| H A D | pl111_display.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) COPYRIGHT 2012-2013 ARM Limited. All rights reserved.
7 * Copyright (c) 2006-2008 Intel Corporation
14 #include <linux/dma-buf.h>
15 #include <linux/media-bus-format.h>
33 irq_stat = readl(priv->regs + CLCD_PL111_MIS); in pl111_irq()
39 drm_crtc_handle_vblank(&priv->pipe.crtc); in pl111_irq()
45 writel(irq_stat, priv->regs + CLCD_PL111_ICR); in pl111_irq()
54 struct drm_device *drm = pipe->crtc.dev; in pl111_mode_valid()
55 struct pl111_drm_dev_private *priv = drm->dev_private; in pl111_mode_valid()
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| /openbmc/linux/Documentation/driver-api/ |
| H A D | rfkill.rst | 2 rfkill - RF kill switch support
14 radiate any power.
25 - hard block
26 read-only radio block that cannot be overridden by software
28 - soft block
34 admin-guide/kernel-parameters.rst.
43 * the deprecated rfkill-input module (an input layer handler, being
49 the system know about hardware-disabled states that may be implemented on
56 When the device is hard-blocked (either by a call to rfkill_set_hw_state()
77 core with the current state at resume time.
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| /openbmc/linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3399-kobol-helios64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 /dts-v1/;
15 #include "rk3399-opp.dtsi"
29 avdd_0v9_s0: avdd-0v9-s0 {
30 compatible = "regulator-fixed";
31 regulator-name = "avdd_0v9_s0";
32 regulator-always-on;
33 regulator-boot-on;
34 regulator-min-microvolt = <900000>;
35 regulator-max-microvolt = <900000>;
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| /openbmc/linux/Documentation/gpu/rfc/ |
| H A D | xe.rst | 8 pre-merge goals, in order to avoid unnecessary delays.
29 As for the power management area, the goal is to have a much-simplified support
30 for the system suspend states (S-states), PCI device suspend states (D-states),
31 GPU/Render suspend states (R-states) and frequency management. It should leverage
32 as much as possible all the existent PCI-subsystem infrastructure (pm and
33 runtime_pm) and underlying firmware components such PCODE and GuC for the power
38 https://gitlab.freedesktop.org/drm/xe/kernel (branch drm-xe-next)
49 official and by-default probe at a given time.
60 only removed when the support for the platform and the uAPI are stable. Stability
68 When the time comes for Xe, the protection will be lifted on Xe and kept in i915.
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| /openbmc/linux/Documentation/devicetree/bindings/mmc/ |
| H A D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
| H A D | spl_power_init.c | 1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
24 * mxs_power_clock2xtal() - Switch CPU core clock source to 24MHz XTAL
39 &clkctrl_regs->hw_clkctrl_clkseq_set); in mxs_power_clock2xtal()
43 * mxs_power_clock2pll() - Switch CPU core clock source to PLL
46 * to PLL. This can only be called once the PLL has re-locked and once
47 * the PLL is stable after reconfiguration.
61 * we aren't giving PLL0 enough time to stabilise? in mxs_power_clock2pll()
63 setbits_le32(&clkctrl_regs->hw_clkctrl_pll0ctrl0, in mxs_power_clock2pll()
71 setbits_le32(&clkctrl_regs->hw_clkctrl_clkseq, in mxs_power_clock2pll()
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| /openbmc/u-boot/arch/arm/mach-exynos/include/mach/ |
| H A D | mipi_dsim.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
62 /* MIPI DSI Processor-to-Peripheral transaction types */
111 * struct mipi_dsim_config - interface for configuring mipi-dsi controller.
139 * in Non-burst mode, RGB data area is filled with RGB data and NULL
147 * if the timer value goes to 0x00000000, the clock stable bit of status
154 * BTA requests to D-PHY automatically. this counter value specifies
157 * this register specifies time out from BTA request to change
160 * this register specifies time out on how long RxValid deasserts,
162 * - RxValid specifies Rx data valid indicator.
163 * - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
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| /openbmc/linux/include/linux/input/ |
| H A D | adxl34x.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
58 * is an unsigned time value representing the maximum
59 * time that an event must be above the tap_threshold threshold
68 * is an unsigned time value representing the wait time
69 * from the detection of a tap event to the opening of the time
79 * is an unsigned time value representing the amount
80 * of time after the expiration of tap_latency during which a second
145 * is an unsigned time value representing the
146 * amount of time that acceleration must be below the value in
152 * result in the function appearing un-responsive if the
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| /openbmc/linux/drivers/phy/hisilicon/ |
| H A D | phy-hi3670-pcie.c | 1 // SPDX-License-Identifier: GPL-2.0
120 /* noc power domain */
145 /* Time for delay */
171 writel(val, phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_writel()
176 return readl(phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_readl()
193 writel(val, phy->base + reg); in kirin_apb_natural_phy_writel()
199 return readl(phy->base + reg); in kirin_apb_natural_phy_readl()
206 regmap_read(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, &val); in hi3670_pcie_phy_oe_enable()
212 regmap_write(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, val); in hi3670_pcie_phy_oe_enable()
217 struct device *dev = phy->dev; in hi3670_pcie_get_eyeparam()
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