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/openbmc/u-boot/drivers/pinctrl/
H A Dpinctrl-sti.c24 #define PU (1 << 26) macro
29 /* oe = 0, pu = 0, od = 0 */
31 /* oe = 0, pu = 1, od = 0 */
32 #define IN_PU (PU)
33 /* oe = 1, pu = 0, od = 0 */
35 /* oe = 1, pu = 1, od = 0 */
36 #define OUT_PU (OE | PU)
37 /* oe = 1, pu = 0, od = 1 */
39 /* oe = 1, pu = 1, od = 1 */
40 #define BIDIR_PU (OE | PU | OD)
[all …]
/openbmc/u-boot/include/configs/
H A Dxpedite537x.h231 * PU = pulled high, PD = pulled low
235 #define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01 /* PU; UART0 enable (1: enabled) */
236 #define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02 /* PU; UART0 serial mode select */
237 #define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04 /* PU; UART1 enable (1: enabled) */
238 #define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08 /* PU; UART1 serial mode select */
239 #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10 /* PU; Boot flash CS select */
240 #define CONFIG_SYS_PCA953X_NVM_WP 0x20 /* PU; Set to 0 to enable NVM writing */
245 #define CONFIG_SYS_PCA953X_XMC0_ROOT0 0x01 /* PU; Low if XMC is RC */
247 #define CONFIG_SYS_PCA953X_XMC0_WAKE 0x04 /* PU; XMC wake */
248 #define CONFIG_SYS_PCA953X_XMC0_BIST 0x08 /* PU; XMC built in self test */
[all …]
H A Dxpedite550x.h233 * GPIO pin definitions, PU = pulled high, PD = pulled low
236 #define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01 /* PU; UART0 enable (1: enabled) */
237 #define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02 /* PU; UART0 serial mode select (1: RS-485, 0: RS-232…
238 #define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04 /* PU; UART1 enable (1: enabled) */
239 #define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08 /* PU; UART1 serial mode select (1: RS-485, 0: RS-232…
240 #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10 /* PU; Boot flash CS select */
241 #define CONFIG_SYS_PCA953X_NVM_WP 0x20 /* PU; Write protection (0: disabled, 1: enabled) */
244 #define CONFIG_SYS_PCA953X_XMC_GA0 0x01 /* PU; */
245 #define CONFIG_SYS_PCA953X_XMC_GA1 0x02 /* PU; */
246 #define CONFIG_SYS_PCA953X_XMC_GA2 0x04 /* PU; */
[all …]
H A Dxpedite517x.h237 * PU = pulled high, PD = pulled low
241 #define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01 /* PU; UART0 enable (1: enabled) */
242 #define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02 /* PU; UART0 serial mode select */
243 #define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04 /* PU; UART1 enable (1: enabled) */
244 #define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08 /* PU; UART1 serial mode select */
245 #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10 /* PU; Boot flash CS select */
246 #define CONFIG_SYS_PCA953X_NVM_WP 0x20 /* PU; Set to 0 to enable NVM writing */
249 #define CONFIG_SYS_PCA953X_XMC0_ROOT0 0x01 /* PU; Low if XMC is RC */
251 #define CONFIG_SYS_PCA953X_XMC0_WAKE 0x04 /* PU; XMC wake */
252 #define CONFIG_SYS_PCA953X_XMC0_BIST 0x08 /* PU; XMC built in self test */
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dst-pincfg.h17 #define PU (1 << 26) macro
30 /* oe = 0, pu = 0, od = 0 */
32 /* oe = 0, pu = 1, od = 0 */
33 #define IN_PU (PU)
34 /* oe = 1, pu = 0, od = 0 */
36 /* oe = 1, pu = 0, od = 1 */
38 /* oe = 1, pu = 1, od = 1 */
39 #define BIDIR_PU (OE | PU | OD)
/openbmc/u-boot/arch/arm/dts/
H A Dst-pincfg.h16 #define PU (1 << 26) macro
29 /* oe = 0, pu = 0, od = 0 */
31 /* oe = 0, pu = 1, od = 0 */
32 #define IN_PU (PU)
33 /* oe = 1, pu = 0, od = 0 */
35 /* oe = 1, pu = 0, od = 1 */
37 /* oe = 1, pu = 1, od = 1 */
38 #define BIDIR_PU (OE | PU | OD)
H A Dimx6q.dtsi33 /* ARM kHz SOC-PU uV */
50 pu-supply = <&reg_pu>;
68 /* ARM kHz SOC-PU uV */
84 pu-supply = <&reg_pu>;
102 /* ARM kHz SOC-PU uV */
118 pu-supply = <&reg_pu>;
136 /* ARM kHz SOC-PU uV */
152 pu-supply = <&reg_pu>;
/openbmc/linux/mm/
H A Dpercpu-stats.c177 #define PU(X) \ in percpu_stats_show() macro
183 PU(nr_alloc); in percpu_stats_show()
184 PU(nr_dealloc); in percpu_stats_show()
185 PU(nr_cur_alloc); in percpu_stats_show()
186 PU(nr_max_alloc); in percpu_stats_show()
187 PU(nr_chunks); in percpu_stats_show()
188 PU(nr_max_chunks); in percpu_stats_show()
189 PU(min_alloc_size); in percpu_stats_show()
190 PU(max_alloc_size); in percpu_stats_show()
194 #undef PU in percpu_stats_show()
/openbmc/qemu/libdecnumber/dpd/
H A Ddecimal128.c89 uInt *pu; /* .. */ in decimal128FromNumber() local
172 pu=(uInt *)d128->bytes; /* overlay */ in decimal128FromNumber()
174 pu[0]=targlo; /* directly store the low int */ in decimal128FromNumber()
175 pu[1]=targml; /* then the mid-low */ in decimal128FromNumber()
176 pu[2]=targmh; /* then the mid-high */ in decimal128FromNumber()
177 pu[3]=targhi; /* then the high int */ in decimal128FromNumber()
180 pu[0]=targhi; /* directly store the high int */ in decimal128FromNumber()
181 pu[1]=targmh; /* then the mid-high */ in decimal128FromNumber()
182 pu[2]=targml; /* then the mid-low */ in decimal128FromNumber()
183 pu[3]=targlo; /* then the low int */ in decimal128FromNumber()
[all …]
/openbmc/linux/fs/orangefs/
H A Dnamei.c50 "%s: %pd: handle:%pU: fsid:%d: new_op:%p: ret:%d:\n", in orangefs_create()
73 "%s: Assigned inode :%pU: for file :%pd:\n", in orangefs_create()
133 gossip_debug(GOSSIP_NAME_DEBUG, "%s:%s:%d using parent %pU\n", in orangefs_lookup()
144 "%s: doing lookup on %s under %pU,%d\n", in orangefs_lookup()
153 "Lookup Got %pU, fsid %d (ret=%d)\n", in orangefs_lookup()
183 " (inode %pU): Parent is %pU | fs_id %d\n", in orangefs_unlink()
258 "Symlink Got ORANGEFS handle %pU on fsid %d (ret=%d)\n", in orangefs_symlink()
287 "Assigned symlink inode new number of %pU\n", in orangefs_symlink()
294 "Inode (Symlink) %pU -> %pd\n", in orangefs_symlink()
333 "Mkdir Got ORANGEFS handle %pU on fsid %d\n", in orangefs_mkdir()
[all …]
H A Dfile.c27 "%s: %pU: Handle is %pU | fs_id %d\n", __func__, in flush_racache()
83 "%s(%pU): GET op %p -> buffer_index %d\n", in wait_for_direct_io()
131 "%s(%pU): offset: %llu total_size: %zd\n", in wait_for_direct_io()
150 "%s(%pU): Calling post_io_request with tag (%llu)\n", in wait_for_direct_io()
230 gossip_err("%s: error in %s handle %pU, returning %zd\n", in wait_for_direct_io()
263 "%s(%pU): Amount %s, returned by the sys-io call:%d\n", in wait_for_direct_io()
275 "%s(%pU): PUT buffer_index %d\n", in wait_for_direct_io()
442 "calling flush_racache on %pU\n", in orangefs_file_release()
H A Dacl.c45 "inode %pU, key %s, type %d\n", in orangefs_get_acl()
57 gossip_err("inode %pU retrieving acl's failed with error %d\n", in orangefs_get_acl()
87 "%s: inode %pU, key %s type %d\n", in __orangefs_set_acl()
/openbmc/qemu/host/include/generic/host/
H A Dstore-insert-al16.h.inc23 __uint128_t *pu;
27 pu = __builtin_assume_aligned(ps, 16);
28 old.u = *pu;
33 } while (!__atomic_compare_exchange_n(pu, &old.u, new.u, true,
/openbmc/openpower-debug-collector/dump/tools/bmcdump/plugins/
H A Dcfam15 command="/usr/bin/edbg getcfam pu 283c -pall"
19 command="/usr/bin/edbg getcfam pu 1007 -pall"
23 command="/usr/bin/edbg getcfam pu 2809 -pall"
/openbmc/phosphor-debug-collector/tools/dreport.d/openpower.d/plugins.d/
H A Dcfam15 command="/usr/bin/edbg getcfam pu 283c -pall"
19 command="/usr/bin/edbg getcfam pu 1007 -pall"
23 command="/usr/bin/edbg getcfam pu 2809 -pall"
/openbmc/linux/arch/powerpc/mm/
H A Dhugetlbpage.c115 pud_t *pu; in huge_pte_alloc() local
138 pu = pud_alloc(mm, p4, addr); in huge_pte_alloc()
139 if (!pu) in huge_pte_alloc()
142 return (pte_t *)pu; in huge_pte_alloc()
144 ptl = pud_lockptr(mm, pu); in huge_pte_alloc()
145 hpdp = (hugepd_t *)pu; in huge_pte_alloc()
148 pm = pmd_alloc(mm, pu, addr); in huge_pte_alloc()
166 pu = pud_alloc(mm, p4, addr); in huge_pte_alloc()
167 if (!pu) in huge_pte_alloc()
170 ptl = pud_lockptr(mm, pu); in huge_pte_alloc()
[all …]
/openbmc/qemu/target/arm/tcg/
H A Da32-uncond.decode37 &rfe rn w pu
38 &srs mode w pu
41 RFE 1111 100 pu:2 0 w:1 1 rn:4 0000 1010 0000 0000 &rfe
42 SRS 1111 100 pu:2 1 w:1 0 1101 0000 0101 000 mode:5 &srs
/openbmc/linux/sound/pci/
H A Dazt3328.h5 /* "PU" == "power-up value", as tested on PCI168 PCI rev. 10
24 #define IDX_IO_CODEC_DMA_FLAGS 0x00 /* PU:0x0000 */
40 #define IDX_IO_CODEC_IRQTYPE 0x02 /* PU:0x0001 */
52 /* start address of 1st DMA transfer area, PU:0x00000000 */
54 /* start address of 2nd DMA transfer area, PU:0x00000000 */
56 /* both lengths of DMA transfer areas, PU:0x00000000
59 #define IDX_IO_CODEC_DMA_CURRPOS 0x10 /* current DMA position, PU:0x00000000 */
60 /* offset within current DMA transfer area, PU:0x0000 */
62 #define IDX_IO_CODEC_SOUNDFORMAT 0x16 /* PU:0x0010 */
139 * maybe some buffer limit, but I couldn't find out more, PU:0x00ff: */
/openbmc/u-boot/arch/x86/cpu/quark/
H A Dsmc.c565 /* RCOMP Vref PU/PD */ in ddrphy_init()
569 /* RCOMP Vref PU/PD */ in ddrphy_init()
573 /* RCOMP Vref PU/PD */ in ddrphy_init()
577 /* RCOMP Vref PU/PD */ in ddrphy_init()
581 /* RCOMP Vref PU/PD */ in ddrphy_init()
592 /* ODT Vref PU/PD */ in ddrphy_init()
596 /* ODT Vref PU/PD */ in ddrphy_init()
600 /* ODT Vref PU/PD */ in ddrphy_init()
622 /* ODTCOMP CMD/CTL PU/PD */ in ddrphy_init()
634 /* RCOMP PU */ in ddrphy_init()
[all …]
/openbmc/openbmc/meta-amd/meta-ethanolx/recipes-amd/amd-fpga/files/
H A Dfpgardu.sh228 echo "FPGA_SW1-1 - OFF - P0 PwrReg PU with Proc"
230 echo "FPGA_SW1-1 - ON - P0 PwrReg PU without Proc"
233 echo "FPGA_SW1-1 - OFF - P1 PwrReg PU with Proc"
235 echo "FPGA_SW1-1 - ON - P1 PwrReg PU without Proc"
248 echo "FPGA_SW1-5 - OFF - MemPwrReg PU after ATX"
250 echo "FPGA_SW1-5 - ON - MemPwrReg PU before ATX"
322 echo PU Error: PU1$((DATA & 0x0F))
329 echo PU Error: PU2$((DATA & 0x07))
335 echo PU Error: PU1$((DATA & 0x0F))
341 echo PU Error: PU4$((DATA & 0x07))
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q.dtsi33 /* ARM kHz SOC-PU uV */
50 pu-supply = <&reg_pu>;
70 /* ARM kHz SOC-PU uV */
87 pu-supply = <&reg_pu>;
105 /* ARM kHz SOC-PU uV */
122 pu-supply = <&reg_pu>;
140 /* ARM kHz SOC-PU uV */
157 pu-supply = <&reg_pu>;
/openbmc/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common-v2.c570 * 1. PU + PD
578 int err, pu, pd; in mtk_pinconf_bias_set_pu_pd() local
581 pu = 0; in mtk_pinconf_bias_set_pu_pd()
584 pu = 1; in mtk_pinconf_bias_set_pu_pd()
587 pu = 0; in mtk_pinconf_bias_set_pu_pd()
594 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, pu); in mtk_pinconf_bias_set_pu_pd()
813 int pu, pd, rsel, err; in mtk_pinconf_bias_get_pu_pd_rsel() local
819 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); in mtk_pinconf_bias_get_pu_pd_rsel()
827 if (pu == 0 && pd == 0) { in mtk_pinconf_bias_get_pu_pd_rsel()
830 } else if (pu == 1 && pd == 0) { in mtk_pinconf_bias_get_pu_pd_rsel()
[all …]
/openbmc/openbmc-test-automation/openpower/ras/
H A Dtest_sanity_ecmd.robot22 Ecmd getscom pu.c 20028440 -all
27 Ecmd getcfam pu ${cfam_address} -all
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx93-tqma9352-mba93xxla.dts613 /* HYS | PD | PU | FSEL_3 | DSE X5 */
615 /* HYS | PD | PU | FSEL_3 | DSE X4 */
617 /* HYS | PD | PU | FSEL_3 | DSE X3 */
622 /* PD | PU | FSEL_2 | DSE X3 */
629 /* HYS | PD | PU | FSEL_3 | DSE X6 */
631 /* HYS | PD | PU | FSEL_3 | DSE X4 */
637 /* PD | PU | FSEL_2 | DSE X3 */
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dgm200.c34 gm200_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in gm200_sor_dp_drive() argument
41 pu &= 0x0f; in gm200_sor_dp_drive()
46 if ((data[2] & 0x00000f00) < (pu << 8) || ln == 0) in gm200_sor_dp_drive()
47 data[2] = (data[2] & ~0x00000f00) | (pu << 8); in gm200_sor_dp_drive()

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