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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-anbernic-rg353x.dtsi19 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
H A Drk3399-pinephone-pro.dts602 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>;
614 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>;
H A Drk3566-anbernic-rg503.dts108 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Drockchip,px30-cru.yaml114 clocks = <&xin24m>, <&pmucru PLL_GPLL>;
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3036-cru.h13 #define PLL_GPLL 3 macro
H A Drk3128-cru.h12 #define PLL_GPLL 3 macro
H A Drk3228-cru.h13 #define PLL_GPLL 4 macro
H A Drk3188-cru-common.h14 #define PLL_GPLL 4 macro
H A Drv1108-cru.h13 #define PLL_GPLL 2 macro
H A Drk3368-cru.h23 #define PLL_GPLL 5 macro
H A Drk3328-cru.h13 #define PLL_GPLL 4 macro
H A Drk3288-cru.h11 #define PLL_GPLL 4 macro
H A Drk3399-cru.h14 #define PLL_GPLL 5 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3036-cru.h13 #define PLL_GPLL 3 macro
H A Drk3188-cru-common.h14 #define PLL_GPLL 4 macro
H A Drk3228-cru.h14 #define PLL_GPLL 4 macro
H A Drk3128-cru.h14 #define PLL_GPLL 4 macro
H A Drv1108-cru.h13 #define PLL_GPLL 2 macro
H A Dpx30-cru.h182 #define PLL_GPLL 1 macro
H A Drk3368-cru.h14 #define PLL_GPLL 5 macro
H A Drk3328-cru.h14 #define PLL_GPLL 4 macro
H A Drk3288-cru.h14 #define PLL_GPLL 4 macro
H A Drockchip,rv1126-cru.h13 #define PLL_GPLL 1 macro
H A Drk3399-cru.h15 #define PLL_GPLL 5 macro
/openbmc/u-boot/arch/arm/dts/
H A Drk3036.dtsi106 assigned-clocks = <&cru PLL_GPLL>;

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