| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | samsung,s3c64xx-clock.txt | 74 clocks = <&clock PCLK_UART0>, <&clocks PCLK_UART0>,
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| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | samsung_uart.yaml | 142 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
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| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | s3c64xx.dtsi | 123 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 69 #define PCLK_UART0 341 macro
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| H A D | rk3128-cru.h | 72 #define PCLK_UART0 341 macro
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| H A D | exynos7420-clk.h | 81 #define PCLK_UART0 1 macro
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| H A D | rk3228-cru.h | 76 #define PCLK_UART0 341 macro
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| H A D | rk3188-cru-common.h | 82 #define PCLK_UART0 332 macro
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| H A D | rv1108-cru.h | 119 #define PCLK_UART0 265 macro
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| H A D | rk3368-cru.h | 128 #define PCLK_UART0 341 macro
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| H A D | rk3328-cru.h | 140 #define PCLK_UART0 310 macro
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| H A D | rk3288-cru.h | 128 #define PCLK_UART0 341 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 68 #define PCLK_UART0 341 macro
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| H A D | samsung,s3c64xx-clock.h | 88 #define PCLK_UART0 73 macro
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| H A D | exynos7-clk.h | 78 #define PCLK_UART0 1 macro
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| H A D | rk3188-cru-common.h | 84 #define PCLK_UART0 332 macro
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| H A D | rk3228-cru.h | 107 #define PCLK_UART0 341 macro
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| H A D | rk3128-cru.h | 108 #define PCLK_UART0 341 macro
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| H A D | rv1108-cru.h | 116 #define PCLK_UART0 265 macro
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| H A D | rk3368-cru.h | 125 #define PCLK_UART0 341 macro
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| H A D | rk3308-cru.h | 176 #define PCLK_UART0 197 macro
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| H A D | rk3328-cru.h | 141 #define PCLK_UART0 210 macro
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| H A D | rk3288-cru.h | 133 #define PCLK_UART0 341 macro
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-s3c64xx.c | 244 GATE_BUS(PCLK_UART0, "pclk_uart0", "pclk", PCLK_GATE, 1),
349 ALIAS(PCLK_UART0, "s3c6400-uart.0", "uart"),
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rk3188.c | 652 GATE(PCLK_UART0, "pclk_uart0", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
743 GATE(PCLK_UART0, "pclk_uart0", "hclk_ahb2apb", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
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