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/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c351 case PCLK_I2C0: in rk3128_peri_get_pclk()
375 case PCLK_I2C0: in rk3128_peri_set_pclk()
488 case PCLK_I2C0: in rk3128_clk_get_rate()
524 case PCLK_I2C0: in rk3128_clk_set_rate()
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3036-cru.h65 #define PCLK_I2C0 332 macro
H A Drk3128-cru.h67 #define PCLK_I2C0 332 macro
H A Drk3228-cru.h71 #define PCLK_I2C0 332 macro
H A Drk3188-cru-common.h86 #define PCLK_I2C0 336 macro
H A Drk3368-cru.h119 #define PCLK_I2C0 332 macro
H A Drk3328-cru.h135 #define PCLK_I2C0 305 macro
H A Drk3288-cru.h119 #define PCLK_I2C0 332 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3036-cru.h64 #define PCLK_I2C0 332 macro
H A Drk3188-cru-common.h88 #define PCLK_I2C0 336 macro
H A Drk3228-cru.h102 #define PCLK_I2C0 332 macro
H A Drk3128-cru.h103 #define PCLK_I2C0 332 macro
H A Dpx30-cru.h157 #define PCLK_I2C0 334 macro
H A Drk3368-cru.h116 #define PCLK_I2C0 332 macro
H A Drk3308-cru.h181 #define PCLK_I2C0 202 macro
H A Drk3328-cru.h136 #define PCLK_I2C0 205 macro
H A Drk3288-cru.h124 #define PCLK_I2C0 332 macro
H A Drockchip,rv1126-cru.h46 #define PCLK_I2C0 33 macro
H A Drockchip,rk3588-cru.h642 #define PCLK_I2C0 627 macro
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-rk3x.yaml135 clocks = <&cru PCLK_I2C0>;
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c420 GATE(PCLK_I2C0, "pclk_i2c0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 4, GFLAGS),
H A Dclk-rk3128.c507 GATE(PCLK_I2C0, "pclk_i2c0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 4, GFLAGS),
H A Dclk-rk3228.c601 GATE(PCLK_I2C0, "pclk_i2c0", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 15, GFLAGS),
/openbmc/u-boot/arch/arm/dts/
H A Drk3xxx.dtsi253 clocks = <&cru PCLK_I2C0>;
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3xxx.dtsi312 clocks = <&cru PCLK_I2C0>;

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