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/openbmc/openbmc/meta-nuvoton/conf/machine/include/
H A Dnpcm8xx.inc2 #@NAME: Nuvoton NPCM8XX
3 #@DESCRIPTION: Common machine configuration for Nuvoton NPCM8XX Chip
31 SOC_FAMILY = "npcm8xx"
33 MACHINEOVERRIDES .= ":npcm8xx"
37 COMPATIBLE_MACHINE:npcm8xx = "npcm8xx"
/openbmc/openbmc/meta-phosphor/classes/
H A Dimage_types_phosphor_nuvoton_npcm8xx.bbclass25 do_make_ubi[depends] += "npcm8xx-bootloader:do_deploy"
26 do_generate_ubi_tar[depends] += "npcm8xx-bootloader:do_deploy"
27 do_generate_static_tar[depends] += "npcm8xx-bootloader:do_deploy"
29 npcm8xx-bootloader:do_deploy \
32 do_generate_static_norootfs[depends] += "npcm8xx-bootloader:do_deploy"
33 do_generate_ext4_tar[depends] += "npcm8xx-bootloader:do_deploy"
/openbmc/openbmc/meta-nuvoton/recipes-bsp/images/
H A Dnpcm8xx-tip-fw.inc1 SUMMARY = "TIP FW for NPCM8XX (Arbel) devices"
2 DESCRIPTION = "TIP FW for NPCM8XX (Arbel) devices"
3 HOMEPAGE = "https://github.com/Nuvoton-Israel/npcm8xx-tip-fw"
11 SRC_URI = "git://github.com/Nuvoton-Israel/npcm8xx-tip-fw;branch=main;protocol=https"
H A Dnpcm8xx-bootloader_04.02.07.bb1 SUMMARY = "Nuvoton NPCM8XX bootloader"
2 DESCRIPTION = "This is front end recipe for NPCM8XX IGPS. It replace \
7 HOMEPAGE = "https://github.com/Nuvoton-Israel/igps-npcm8xx"
13 git://github.com/Nuvoton-Israel/igps-npcm8xx;branch=${IGPS_BRANCH};protocol=https \
60 npcm8xx-tip-fw:do_deploy npcm8xx-bootblock:do_deploy \
H A Dnpcm8xx-bootblock.inc1 SUMMARY = "Primary bootloader for NPCM8XX (Arbel) devices"
2 DESCRIPTION = "Primary bootloader for NPCM8XX (Arbel) devices"
3 HOMEPAGE = "https://github.com/Nuvoton-Israel/npcm8xx-bootblock"
13 git://github.com/Nuvoton-Israel/npcm8xx-bootblock;branch=${BB_BRANCH};protocol=https"
H A Dnpcm8xx-bootblock_0.5.4.bb3 require npcm8xx-bootblock.inc
H A Dnpcm8xx-tip-fw_0.7.6.0.6.5.bb5 require npcm8xx-tip-fw.inc
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dnuvoton,npcm845-clk.yaml7 title: Nuvoton NPCM8XX Clock Controller
13 Nuvoton Arbel BMC NPCM8XX contains an integrated clock controller, which
27 See include/dt-bindings/clock/nuvoton,npcm8xx-clock.h for the full
28 list of NPCM8XX clock IDs.
/openbmc/openbmc/meta-facebook/meta-yosemite4/meta-yosemite4n/conf/machine/
H A Dyosemite4n.conf12 ARCH_DEFAULT_KERNELIMAGETYPE:npcm8xx = "Image"
15 require conf/machine/include/npcm8xx.inc
17 UBOOT_MKIMAGE:append:npcm8xx = " -E -B 8"
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dnuvoton,npcm-fiu.txt9 The NPCM8XX supports four FIU modules,
15 "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
38 In the NPCM8XX BMC:
/openbmc/openbmc/meta-nuvoton/recipes-phosphor/ipmi/
H A Dphosphor-ipmi-flash_%.bbappend1 # NPCM8xx is using 0x0850 as PCI device-id.
3 EXTRA_OEMESON:append:npcm8xx = " -Dnuvoton-pci-did=${NUVOTON_PCI_DID}"
/openbmc/openbmc/meta-nuvoton/dynamic-layers/arm-layer/recipes-security/optee/
H A Doptee-os_%.bbappend1 EXTRA_OEMAKE:append:npcm8xx = " \
11 do_deploy:npcm8xx() {
/openbmc/openbmc/meta-nuvoton/recipes-kernel/linux/
H A Dlinux-nuvoton.inc12 SRC_URI:append:npcm8xx = " file://npcm8xx_defconfig"
18 UBOOT_MKIMAGE:append:npcm8xx = " -E -B 8"
/openbmc/linux/drivers/pinctrl/nuvoton/
H A DKconfig37 tristate "Pinctrl and GPIO driver for Nuvoton NPCM8XX"
47 the Nuvoton NPCM8XX SoC. This is strongly recommended when
H A DMakefile6 obj-$(CONFIG_PINCTRL_NPCM8XX) += pinctrl-npcm8xx.o
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dnuvoton,sgpio.yaml13 This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC and detailed
19 NPCM7xx/NPCM8xx have two sgpio modules. Each module can support up
/openbmc/linux/Documentation/devicetree/bindings/hwmon/
H A Dnpcm750-pwm-fan.txt6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
13 : "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX.
/openbmc/google-misc/subprojects/espi-control/
H A Dnpcm7xx_espi_control.cpp18 * It could also be extended to support NPCM8xx, but it hasn't been tested with
121 * Note: This binary would probably work on NPCM8xx, as well, if we also in modifyESPIRegisters()
122 * allowed the NPCM8xx PDID, since the register addresses are the same. But in modifyESPIRegisters()
/openbmc/linux/drivers/clk/
H A Dclk-npcm8xx.c3 * Nuvoton NPCM8xx Clock Generator
24 #include <soc/nuvoton/clock-npcm8xx.h>
26 /* npcm8xx clock registers*/
415 .name = "reset_npcm.clk-npcm8xx",
427 MODULE_DESCRIPTION("Clock driver for Nuvoton NPCM8XX BMC SoC");
/openbmc/openbmc/meta-nuvoton/recipes-bsp/u-boot/
H A Du-boot-nuvoton_2023.10.bb1 DESCRIPTION = "U-boot for Nuvoton NPCM7xx/NPCM8xx Baseboard Management Controller"
H A Du-boot-nuvoton_2021.04.bb1 DESCRIPTION = "U-boot for Nuvoton NPCM7xx/NPCM8xx Baseboard Management Controller"
/openbmc/openbmc/meta-nuvoton/conf/
H A Dlayer.conf11 LAYERDEPENDS_nuvoton-layer:append:npcm8xx = " meta-arm"
/openbmc/linux/arch/arm64/
H A DKconfig.platforms244 General support for NPCM8xx BMC (Arbel).
245 Nuvoton NPCM8xx BMC based on the Cortex A35.
/openbmc/linux/include/dt-bindings/clock/
H A Dnuvoton,npcm845-clk.h6 * Device Tree binding constants for NPCM8XX clock controller.
/openbmc/linux/drivers/peci/controller/
H A DKconfig27 and NPCM8XX SoCs. It allows BMC to discover devices connected

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