| /openbmc/linux/Documentation/devicetree/bindings/ |
| H A D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-ma
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| /openbmc/linux/drivers/edac/ |
| H A D | fsl_ddr_edac.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Support Power-based SoCs including MPC85xx, MPC86xx, MPC83xx and
6 * ARM-based Layerscape SoCs including LS2xxx and LS1021A. Originally
11 * 2006-2007 (c) MontaVista Software, Inc.
54 #define DDR_EIE_SBEE 0x4 /* single-bit ECC error */
55 #define DDR_EIE_MBEE 0x8 /* multi-bit ECC error */
59 #define DDR_EDE_SBE 0x4 /* single-bit ECC error */
60 #define DDR_EDE_MBE 0x8 /* multi-bit ECC error */
65 #define DDR_EDI_SBED 0x4 /* single-bit ECC error disable */
66 #define DDR_EDI_MBED 0x8 /* multi-bit ECC error disable */
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| /openbmc/linux/drivers/eisa/ |
| H A D | eisa.ids | 6 # Marc Zyngier <maz@wild-wind.fr.eu.org>
10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
25 ACE7010 "ACME Multi-Function Board"
39 ACR1711 "AcerFrame 1000 486/33 SYSTEM-2"
41 ACR3211 "AcerFrame 3000MP 486 SYSTEM-1"
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| /openbmc/linux/arch/parisc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
17 select ARCH_SPLIT_ARG64 if !64BIT
37 select GENERIC_ATOMIC64 if !64BIT
79 select HAVE_DYNAMIC_FTRACE if $(cc-option,-fpatchable-function-entry=1,1)
86 select HAVE_FUNCTION_DESCRIPTORS if 64BIT
90 The PA-RISC microprocessor is designed by Hewlett-Packard and used
92 and later HP3000 series). The PA-RISC Linux project home page is
120 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
139 default 18 if 64BIT
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| /openbmc/linux/Documentation/devicetree/bindings/display/ |
| H A D | multi-inno,mi0283qt.txt | 1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
16 - backlight: phandle of the backlight device attached to the panel
17 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
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| /openbmc/linux/drivers/media/dvb-frontends/drx39xyj/ |
| H A D | drx_dap_fasi.h | 2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
48 /*-------- compilation control switches --------------------------------------*/
53 /*-------- Required includes -------------------------------------------------*/
57 /*-------- Defines, configuring the API --------------------------------------*/
98 #error At least one of short- or long-addressing format must be allowed.
103 * Single/master multi master setting
106 * Comments about SINGLE MASTER/MULTI MASTER modes:
113 * + multi master mode means use of repeated starts
118 * Single/multi master selected via the flags in the FASI protocol.
121 * Default is single master, DAP FASI changes multi-master setting silently
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| /openbmc/u-boot/doc/device-tree-bindings/timer/ |
| H A D | atcpit100_timer.txt | 2 ------------------------------------------------------------------
6 This timer is a set of compact multi-function timers, which can be
10 multi-function timer and provide the following usage scenarios:
11 One 32-bit timer
12 Two 16-bit timers
13 Four 8-bit timers
14 One 16-bit PWM
15 One 16-bit timer and one 8-bit PWM
16 Two 8-bit timer and one 8-bit PWM
19 - compatible : Should be "andestech,atcpit100"
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| /openbmc/u-boot/drivers/adc/ |
| H A D | Kconfig | 5 by single and multi-channel methods for:
6 - start/stop/get data for conversion of a single-channel selected by
7 a number or multi-channels selected by a bitmask
8 - get data mask (ADC resolution)
10 - methods for get Vdd/Vss reference Voltage values with polarity
11 - support supply's phandle with auto-enable
12 - supply polarity setting in fdt
19 - 10 analog input channels
20 - 12-bit resolution
21 - 600 KSPS of sample rate
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| /openbmc/qemu/tests/qemu-iotests/ |
| H A D | 307.out | 5 {"execute": "nbd-server-start", "arguments": {"addr": {"data": {"path": "SOCK_DIR/PID-socket"}, "ty…
7 {"execute": "query-block-exports", "arguments": {}}
10 === Create a read-only NBD export ===
11 {"execute": "block-export-add", "arguments": {"id": "export0", "node-name": "fmt", "type": "nbd"}}
13 {"execute": "query-block-exports", "arguments": {}}
14 {"return": [{"id": "export0", "node-name": "fmt", "shutting-down": false, "type": "nbd"}]}
18 flags: 0x158f ( readonly flush fua df multi cache block-status-payload )
22 transaction size: 64-bit
28 {"execute": "block-export-add", "arguments": {"id": "#invalid", "node-name": "fmt", "type": "nbd"}}
30 {"execute": "block-export-add", "arguments": {"id": "export0", "node-name": "fmt", "type": "nbd"}}
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| /openbmc/u-boot/include/ |
| H A D | adc.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
10 /* ADC_CHANNEL() - ADC channel bit mask, to select only required channels */
13 /* The last possible selected channel with 32-bit mask */
19 * - ADC_DATA_FORMAT_BIN - binary offset
20 * - ADC_DATA_FORMAT_2S - two's complement
31 * struct adc_channel - structure to hold channel conversion data.
32 * Useful to keep the result of a multi-channel conversion output.
34 * @id - channel id
35 * @data - channel conversion data
43 * struct adc_uclass_platdata - basic ADC info
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| /openbmc/linux/arch/powerpc/kvm/ |
| H A D | book3s_hv_ras.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 #define SRR1_MC_LDSTERR (1ul << (63-42))
22 #define SRR1_MC_IFETCH_SH (63-45)
25 #define SRR1_MC_IFETCH_SLBMULTI 3 /* SLB multi-hit */
26 #define SRR1_MC_IFETCH_SLBPARMULTI 4 /* SLB parity + multi-hit */
27 #define SRR1_MC_IFETCH_TLBMULTI 5 /* I-TLB multi-hit */
30 #define DSISR_MC_DERAT_MULTI 0x800 /* D-ERAT multi-hit */
31 #define DSISR_MC_TLB_MULTI 0x400 /* D-TLB multi-hit */
33 #define DSISR_MC_SLB_MULTI 0x080 /* SLB multi-hit */
34 #define DSISR_MC_SLB_PARMULTI 0x040 /* SLB parity + multi-hit */
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| /openbmc/linux/arch/sh/mm/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
9 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
12 On other systems (such as the SH-3 and 4) where an MMU exists,
68 config 29BIT
69 def_bool !32BIT
72 config 32BIT
77 bool "Support 32-bit physical addressing through PMB"
79 select 32BIT
83 32-bits through the SH-4A PMB. If this is not set, legacy
84 29-bit physical addressing will be used.
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| /openbmc/linux/sound/pci/ctxfi/ |
| H A D | ctresource.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 /* Resource allocation based on bit-map management mechanism */
24 unsigned int multi, unsigned int *ridx) in get_resource() argument
29 for (i = 0, n = multi; i < amount; i++) { in get_resource()
33 n = multi; in get_resource()
36 if (!(--n)) in get_resource()
42 return -ENOENT; in get_resource()
45 /* Mark the contiguous bits in resource bit-map as used */ in get_resource()
46 for (n = multi; n > 0; n--) { in get_resource()
50 i--; in get_resource()
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| /openbmc/linux/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| H A D | mac.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
11 * AUX indices follows - 1 for non-CDB, 2 for CDB.
31 * enum iwl_mac_protection_flags - MAC context flags
40 MAC_PROT_FLG_TGG_PROTECT = BIT(3),
41 MAC_PROT_FLG_HT_PROT = BIT(23),
42 MAC_PROT_FLG_FAT_PROT = BIT(24),
43 MAC_PROT_FLG_SELF_CTS_EN = BIT(30),
46 #define MAC_FLG_SHORT_SLOT BIT(4)
47 #define MAC_FLG_SHORT_PREAMBLE BIT(5)
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| /openbmc/linux/sound/soc/sof/ |
| H A D | ipc4-topology.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
14 #define SOF_IPC4_FW_PAGE_SIZE BIT(12)
15 #define SOF_IPC4_FW_PAGE(x) ((((x) + BIT(12) - 1) & ~(BIT(12) - 1)) >> 12)
16 #define SOF_IPC4_FW_ROUNDUP(x) (((x) + BIT(6) - 1) & (~(BIT(6) - 1)))
19 #define SOF_IPC4_MODULE_AUTO_START BIT(4)
22 * LL domain - Low latency domain
23 * DP domain - Data processing domain
26 #define SOF_IPC4_MODULE_LL BIT(5)
27 #define SOF_IPC4_MODULE_DP BIT(6)
28 #define SOF_IPC4_MODULE_LIB_CODE BIT(7)
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| /openbmc/linux/include/linux/soundwire/ |
| H A D | sdw_intel.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
29 #define SDW_SHIM_LCTL_SPA BIT(0)
31 #define SDW_SHIM_LCTL_CPA BIT(8)
37 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
38 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
40 #define SDW_SHIM_SYNC_SYNCCPU BIT(15)
42 #define SDW_SHIM_SYNC_CMDSYNC BIT(16)
43 #define SDW_SHIM_SYNC_SYNCGO BIT(24)
68 #define SDW_SHIM_PCMSYCM_DIR BIT(15)
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| /openbmc/u-boot/drivers/mtd/spi/ |
| H A D | sf_internal.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
41 #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */
42 #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */
43 #define SST_WRITE BIT(2) /* use SST byte programming */
44 #define SPI_NOR_NO_FR BIT(3) /* Can't do fastread */
45 #define SECT_4K_PMC BIT(4) /* SPINOR_OP_BE_4K_PMC works uniformly */
46 #define SPI_NOR_DUAL_READ BIT(5) /* Flash supports Dual Read */
47 #define SPI_NOR_QUAD_READ BIT(6) /* Flash supports Quad Read */
48 #define USE_FSR BIT(7) /* use flag status register */
49 #define SPI_NOR_HAS_LOCK BIT(8) /* Flash supports lock/unlock via SR */
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| /openbmc/libcper/include/libcper/sections/ |
| H A D | cper-section-memory.h | 34 "Unknown", "No Error", "Single-bit ECC", "Multi-bit ECC", \
35 "Single-symbol ChipKill ECC", \
36 "Multi-symbol ChipKill ECC", "Master Abort", \
40 "Physical Memory Map-out Event" \
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| /openbmc/linux/drivers/iio/dac/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
22 tristate "Analog Devices AD5064 and similar multi-channel DAC driver"
26 AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R, AD5627, AD5627R,
40 AD5362, AD5363, AD5370, AD5371, AD5373 multi-channel
53 AD5382, AD5383, AD5384, AD5390, AD5391, AD5392 multi-channel
63 Say yes here to build support for Analog Devices AD5421 loop-powered
64 digital-to-analog convertors (DAC).
151 tristate "Analog Devices AD5686 and similar multi-channel DACs (SPI)"
163 tristate "Analog Devices AD5696 and similar multi-channel DACs (I2C)"
176 tristate "Analog Devices AD5755/AD5755-1/AD5757/AD5735/AD5737 DAC driver"
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| /openbmc/linux/Documentation/devicetree/bindings/dma/ |
| H A D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: dma-controller.yaml#
19 - const: snps,dma-spear1340
20 - items:
21 - enum:
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| /openbmc/linux/Documentation/admin-guide/mm/ |
| H A D | multigen_lru.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Multi-Gen LRU
6 The multi-gen LRU is an alternative LRU implementation that optimizes
26 -----------
38 0x0001 The main switch for the multi-gen LRU.
39 0x0002 Clearing the accessed bit in leaf page table entries in large
42 disabled, the multi-gen LRU will suffer a minor performance
46 0x0004 Clearing the accessed bit in non-leaf page table entries as
49 disabled, the multi-gen LRU will suffer a negligible
65 --------------------
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| /openbmc/linux/arch/riscv/kernel/ |
| H A D | cpufeature.c | 1 // SPDX-License-Identifier: GPL-2.0-only
27 #include "copy-unaligned.h"
29 #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
33 #define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80)
40 /* Per-cpu ISA extensions. */
47 * riscv_isa_extension_base() - Get base extension word
63 * __riscv_isa_extension_available() - Check whether given extension
67 * @bit: bit position of the desired extension
72 bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit) in __riscv_isa_extension_available() argument
76 if (bit >= RISCV_ISA_EXT_MAX) in __riscv_isa_extension_available()
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| /openbmc/linux/drivers/gpu/drm/tiny/ |
| H A D | mi0283qt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DRM driver for Multi-Inno MI0283QT panels
46 #define ILI9341_MADCTL_BGR BIT(3)
47 #define ILI9341_MADCTL_MV BIT(5)
48 #define ILI9341_MADCTL_MX BIT(6)
49 #define ILI9341_MADCTL_MY BIT(7)
55 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); in mi0283qt_enable()
56 struct mipi_dbi *dbi = &dbidev->dbi; in mi0283qt_enable()
60 if (!drm_dev_enter(pipe->crtc.dev, &idx)) in mi0283qt_enable()
116 * resets only on power-on and not on each reboot through in mi0283qt_enable()
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| /openbmc/linux/Documentation/input/devices/ |
| H A D | sentelic.rst | 8 :Copyright: |copy| 2002-2011 Sentelic Corporation.
10 :Last update: Dec-07-2011
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
30 |---------------| |---------------| |---------------| |---------------|
34 Bit5 => Y sign bit
35 Bit4 => X sign bit
40 Byte 2: X Movement(9-bit 2's complement integers)
41 Byte 3: Y Movement(9-bit 2's complement integers)
43 valid values, -8 ~ +7
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| /openbmc/linux/Documentation/sound/cards/ |
| H A D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
43 front one) and was so excited. It was even with "Four Channel" bit
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
60 4/6 Multi-Channel Playback
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