/openbmc/linux/arch/arm/boot/dts/nxp/ls/ |
H A D | Makefile | 3 ls1021a-iot.dtb \ 4 ls1021a-moxa-uc-8410a.dtb \ 5 ls1021a-qds.dtb \ 6 ls1021a-tqmls1021a-mbls1021a.dtb \ 7 ls1021a-tsn.dtb \ 8 ls1021a-twr.dtb
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H A D | ls1021a.dtsi | 112 compatible = "fsl,ls1021a-msi"; 119 compatible = "fsl,ls1021a-msi"; 133 compatible = "fsl,ls1021a-sfp"; 140 compatible = "fsl,ls1021a-dcfg", "syscon"; 146 compatible = "fsl,ls1021a-qspi"; 159 compatible = "fsl,ls1021a-esdhc", "fsl,esdhc"; 171 compatible = "fsl,ls1021a-ahci"; 182 compatible = "fsl,ls1021a-scfg", "syscon"; 190 compatible = "fsl,ls1021a-extirq"; 247 compatible = "fsl,ls1021a-clockgen"; [all …]
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H A D | ls1021a-iot.dts | 8 #include "ls1021a.dtsi" 11 model = "LS1021A-IOT Board"; 12 compatible = "fsl,ls1021a-iot", "fsl,ls1021a";
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H A D | ls1021a-tqmls1021a.dtsi | 9 #include "ls1021a.dtsi" 13 compatible = "tq,ls1021a-tqmls1021a", "fsl,ls1021a";
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H A D | ls1021a-twr.dts | 8 #include "ls1021a.dtsi" 11 model = "LS1021A TWR Board"; 12 compatible = "fsl,ls1021a-twr", "fsl,ls1021a";
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/openbmc/u-boot/board/freescale/ls1021atwr/ |
H A D | README | 3 The LS1021ATWR is a Freescale reference board that hosts the LS1021A SoC. 5 LS1021A SoC Overview 7 The QorIQ LS1 family, which includes the LS1021A communications processor, 12 A member of the value-performance tier, the QorIQ LS1021A processor provides 15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark 20 The QorIQ LS1021A processor features an integrated LCD controller, 23 protection on both L1 and L2 caches. The LS1021A processor is pin- and 26 The LS1021A SoC includes the following function and features: 111 LS1021a rev1.0 Soc specific Options/Settings 113 If the LS1021a Soc is rev1.0, you need modify the configure file.
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/openbmc/u-boot/board/freescale/ls1021aqds/ |
H A D | README | 3 The LS1021AQDS is a Freescale reference board that hosts the LS1021A SoC. 5 LS1021A SoC Overview 7 The QorIQ LS1 family, which includes the LS1021A communications processor, 12 A member of the value-performance tier, the QorIQ LS1021A processor provides 15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark 20 The QorIQ LS1021A processor features an integrated LCD controller, 23 protection on both L1 and L2 caches. The LS1021A processor is pin- and 26 The LS1021A SoC includes the following function and features: 114 LS1021a rev1.0 Soc specific Options/Settings 116 If the LS1021a Soc is rev1.0, you need modify the configure file.
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/openbmc/linux/Documentation/devicetree/bindings/display/ |
H A D | fsl,dcu.txt | 5 * "fsl,ls1021a-dcu". 10 This can be the same clock (e.g. LS1021a) 14 - big-endian Boolean property, LS1021A DCU registers are big-endian. 22 compatible = "fsl,ls1021a-dcu";
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-fsl-dspi.txt | 6 "fsl,ls1021a-v1.0-dspi", 7 "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), 9 "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), 10 "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), 11 "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
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H A D | fsl,spi-fsl-qspi.yaml | 23 - fsl,ls1021a-qspi 28 - const: fsl,ls1021a-qspi 77 compatible = "fsl,ls1021a-qspi";
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/openbmc/u-boot/arch/arm/dts/ |
H A D | ls1021a.dtsi | 3 * Freescale ls1021a SOC common device tree source 12 compatible = "fsl,ls1021a"; 85 compatible = "fsl,ls1021a-dcfg", "syscon"; 102 compatible = "fsl,ls1021a-scfg", "syscon"; 249 compatible = "fsl,ls1021a-lpuart"; 258 compatible = "fsl,ls1021a-lpuart"; 267 compatible = "fsl,ls1021a-lpuart"; 276 compatible = "fsl,ls1021a-lpuart"; 285 compatible = "fsl,ls1021a-lpuart"; 294 compatible = "fsl,ls1021a-lpuart"; [all …]
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H A D | ls1021a-iot.dtsi | 3 * Freescale ls1021a IOT board device tree source 9 #include "ls1021a.dtsi" 12 model = "LS1021A IOT Board";
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H A D | ls1021a-twr.dtsi | 3 * Freescale ls1021a TWR board common device tree source 8 #include "ls1021a.dtsi" 11 model = "LS1021A TWR Board";
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H A D | ls1021a-twr-duart.dts | 3 * Freescale ls1021a TWR board device tree source 9 #include "ls1021a-twr.dtsi"
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H A D | ls1021a-twr-lpuart.dts | 3 * Freescale ls1021a TWR board device tree source 9 #include "ls1021a-twr.dtsi"
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H A D | ls1021a-iot-duart.dts | 3 * Freescale ls1021a IOT board device tree source 9 #include "ls1021a-iot.dtsi"
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H A D | ls1021a-qds-duart.dts | 3 * Freescale ls1021a QDS board common device tree source 9 #include "ls1021a-qds.dtsi"
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H A D | ls1021a-qds-lpuart.dts | 3 * Freescale ls1021a QDS board common device tree source 9 #include "ls1021a-qds.dtsi"
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H A D | fsl-ls1043a.dtsi | 160 compatible = "fsl,ls1021a-lpuart"; 169 compatible = "fsl,ls1021a-lpuart"; 178 compatible = "fsl,ls1021a-lpuart"; 187 compatible = "fsl,ls1021a-lpuart"; 196 compatible = "fsl,ls1021a-lpuart"; 205 compatible = "fsl,ls1021a-lpuart";
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H A D | fsl-ls1046a.dtsi | 160 compatible = "fsl,ls1021a-lpuart"; 169 compatible = "fsl,ls1021a-lpuart"; 178 compatible = "fsl,ls1021a-lpuart"; 187 compatible = "fsl,ls1021a-lpuart"; 196 compatible = "fsl,ls1021a-lpuart"; 205 compatible = "fsl,ls1021a-lpuart";
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/openbmc/linux/arch/arm/mach-imx/ |
H A D | mach-ls1021a.c | 11 "fsl,ls1021a", 15 DT_MACHINE_START(LS1021A, "Freescale LS1021A")
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | fsl,ls-extirq.yaml | 14 Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA, 22 - fsl,ls1021a-extirq 69 - fsl,ls1021a-extirq 105 compatible = "fsl,ls1021a-extirq";
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/openbmc/u-boot/board/freescale/ls1021aiot/ |
H A D | README | 3 The LS1021A-IOT is a Freescale reference board that hosts 4 the LS1021A SoC. 55 LS1021A-IOT support two ways of boot:
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/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | fsl-qdma.txt | 9 "fsl,ls1021a-qdma": for LS1021A Board 40 compatible = "fsl,ls1021a-qdma";
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/openbmc/linux/Documentation/devicetree/bindings/ata/ |
H A D | ahci-fsl-qoriq.txt | 6 chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc. 16 compatible = "fsl,ls1021a-ahci";
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