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/openbmc/linux/arch/arm/boot/dts/nxp/ls/
H A DMakefile3 ls1021a-iot.dtb \
4 ls1021a-moxa-uc-8410a.dtb \
5 ls1021a-qds.dtb \
6 ls1021a-tqmls1021a-mbls1021a.dtb \
7 ls1021a-tsn.dtb \
8 ls1021a-twr.dtb
H A Dls1021a.dtsi112 compatible = "fsl,ls1021a-msi";
119 compatible = "fsl,ls1021a-msi";
133 compatible = "fsl,ls1021a-sfp";
140 compatible = "fsl,ls1021a-dcfg", "syscon";
146 compatible = "fsl,ls1021a-qspi";
159 compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";
171 compatible = "fsl,ls1021a-ahci";
182 compatible = "fsl,ls1021a-scfg", "syscon";
190 compatible = "fsl,ls1021a-extirq";
247 compatible = "fsl,ls1021a-clockgen";
[all …]
H A Dls1021a-iot.dts8 #include "ls1021a.dtsi"
11 model = "LS1021A-IOT Board";
12 compatible = "fsl,ls1021a-iot", "fsl,ls1021a";
H A Dls1021a-tqmls1021a.dtsi9 #include "ls1021a.dtsi"
13 compatible = "tq,ls1021a-tqmls1021a", "fsl,ls1021a";
H A Dls1021a-twr.dts8 #include "ls1021a.dtsi"
11 model = "LS1021A TWR Board";
12 compatible = "fsl,ls1021a-twr", "fsl,ls1021a";
/openbmc/u-boot/board/freescale/ls1021atwr/
H A DREADME3 The LS1021ATWR is a Freescale reference board that hosts the LS1021A SoC.
5 LS1021A SoC Overview
7 The QorIQ LS1 family, which includes the LS1021A communications processor,
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
20 The QorIQ LS1021A processor features an integrated LCD controller,
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
26 The LS1021A SoC includes the following function and features:
111 LS1021a rev1.0 Soc specific Options/Settings
113 If the LS1021a Soc is rev1.0, you need modify the configure file.
/openbmc/u-boot/board/freescale/ls1021aqds/
H A DREADME3 The LS1021AQDS is a Freescale reference board that hosts the LS1021A SoC.
5 LS1021A SoC Overview
7 The QorIQ LS1 family, which includes the LS1021A communications processor,
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
20 The QorIQ LS1021A processor features an integrated LCD controller,
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
26 The LS1021A SoC includes the following function and features:
114 LS1021a rev1.0 Soc specific Options/Settings
116 If the LS1021a Soc is rev1.0, you need modify the configure file.
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dfsl,dcu.txt5 * "fsl,ls1021a-dcu".
10 This can be the same clock (e.g. LS1021a)
14 - big-endian Boolean property, LS1021A DCU registers are big-endian.
22 compatible = "fsl,ls1021a-dcu";
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-fsl-dspi.txt6 "fsl,ls1021a-v1.0-dspi",
7 "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
9 "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
10 "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
11 "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
H A Dfsl,spi-fsl-qspi.yaml23 - fsl,ls1021a-qspi
28 - const: fsl,ls1021a-qspi
77 compatible = "fsl,ls1021a-qspi";
/openbmc/u-boot/arch/arm/dts/
H A Dls1021a.dtsi3 * Freescale ls1021a SOC common device tree source
12 compatible = "fsl,ls1021a";
85 compatible = "fsl,ls1021a-dcfg", "syscon";
102 compatible = "fsl,ls1021a-scfg", "syscon";
249 compatible = "fsl,ls1021a-lpuart";
258 compatible = "fsl,ls1021a-lpuart";
267 compatible = "fsl,ls1021a-lpuart";
276 compatible = "fsl,ls1021a-lpuart";
285 compatible = "fsl,ls1021a-lpuart";
294 compatible = "fsl,ls1021a-lpuart";
[all …]
H A Dls1021a-iot.dtsi3 * Freescale ls1021a IOT board device tree source
9 #include "ls1021a.dtsi"
12 model = "LS1021A IOT Board";
H A Dls1021a-twr.dtsi3 * Freescale ls1021a TWR board common device tree source
8 #include "ls1021a.dtsi"
11 model = "LS1021A TWR Board";
H A Dls1021a-twr-duart.dts3 * Freescale ls1021a TWR board device tree source
9 #include "ls1021a-twr.dtsi"
H A Dls1021a-twr-lpuart.dts3 * Freescale ls1021a TWR board device tree source
9 #include "ls1021a-twr.dtsi"
H A Dls1021a-iot-duart.dts3 * Freescale ls1021a IOT board device tree source
9 #include "ls1021a-iot.dtsi"
H A Dls1021a-qds-duart.dts3 * Freescale ls1021a QDS board common device tree source
9 #include "ls1021a-qds.dtsi"
H A Dls1021a-qds-lpuart.dts3 * Freescale ls1021a QDS board common device tree source
9 #include "ls1021a-qds.dtsi"
H A Dfsl-ls1043a.dtsi160 compatible = "fsl,ls1021a-lpuart";
169 compatible = "fsl,ls1021a-lpuart";
178 compatible = "fsl,ls1021a-lpuart";
187 compatible = "fsl,ls1021a-lpuart";
196 compatible = "fsl,ls1021a-lpuart";
205 compatible = "fsl,ls1021a-lpuart";
H A Dfsl-ls1046a.dtsi160 compatible = "fsl,ls1021a-lpuart";
169 compatible = "fsl,ls1021a-lpuart";
178 compatible = "fsl,ls1021a-lpuart";
187 compatible = "fsl,ls1021a-lpuart";
196 compatible = "fsl,ls1021a-lpuart";
205 compatible = "fsl,ls1021a-lpuart";
/openbmc/linux/arch/arm/mach-imx/
H A Dmach-ls1021a.c11 "fsl,ls1021a",
15 DT_MACHINE_START(LS1021A, "Freescale LS1021A")
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dfsl,ls-extirq.yaml14 Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA,
22 - fsl,ls1021a-extirq
69 - fsl,ls1021a-extirq
105 compatible = "fsl,ls1021a-extirq";
/openbmc/u-boot/board/freescale/ls1021aiot/
H A DREADME3 The LS1021A-IOT is a Freescale reference board that hosts
4 the LS1021A SoC.
55 LS1021A-IOT support two ways of boot:
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dfsl-qdma.txt9 "fsl,ls1021a-qdma": for LS1021A Board
40 compatible = "fsl,ls1021a-qdma";
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dahci-fsl-qoriq.txt6 chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc.
16 compatible = "fsl,ls1021a-ahci";

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