Home
last modified time | relevance | path

Searched full:lp1 (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/arch/arm/mach-tegra/
H A Dpm.c228 * The Tegra devices support suspending to LP1 or lower currently. in tegra_pm_validate_suspend_mode()
259 * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
261 * copy these code to IRAM before LP0/LP1 suspend and restore the content
342 [TEGRA_SUSPEND_LP1] = "LP1",
418 "self-refresh -- LP0/LP1 unavailable\n", in tegra_pm_init_suspend()
H A Dsleep-tegra20.S140 * Enters suspend in LP0 or LP1 by turning off the mmu and jumping to
180 * reset vector for LP1 restore; copied into IRAM during suspend.
267 * puts memory in self-refresh for LP0 and LP1
277 * In LP0 and LP1 all PLLs will be turned off. Switch the CPU and system clock
323 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
H A Dreset-handler.S29 * an LP2 transition. Also branched to by LP0 and LP1 resume after
128 * R8 = CPU in LP1 state mask
193 /* Waking up from LP1? */
201 bleq __die @ no LP1 startup handler
H A Dsleep-tegra30.S281 * Enters suspend in LP0 or LP1 by turning off the MMU and jumping to
295 * LP0 / LP1 use physical address, since the MMU needs to be
354 * reset vector for LP1 restore; copied into IRAM during suspend.
648 * puts memory in self-refresh for LP0 and LP1
658 * In LP0 and LP1 all PLLs will be turned off. Switching the CPU and System CLK
700 /* disable PLLM via PMC in LP1 */
745 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
893 * and COMP in the lowest power mode when LP1.
/openbmc/linux/arch/arm/include/asm/mach/
H A Darch.h41 unsigned char reserve_lp1 :1; /* never has lp1 */
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c2471 /* HSW allows LP1+ watermarks even with multiple pipes */ in ilk_plane_wm_max()
2504 /* HSW LP1+ watermarks w/ multiple pipes */ in ilk_cursor_wm_max()
2824 /* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */ in ilk_compute_pipe_wm()
2963 /* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */ in ilk_wm_merge()
3007 /* LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4 */ in ilk_wm_lp_to_level()
3032 /* LP1+ register values */ in ilk_compute_wm_results()
3133 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3140 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3146 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3150 /* LP1+ watermarks already deemed dirty, no need to continue */ in ilk_compute_wm_dirty()
[all …]
H A Dintel_atomic_plane.c559 * when we start in big FIFO mode (LP1+). Thus we need to drop in intel_plane_atomic_calc_changes()
563 * we've already signalled flip completion. We can resume LP1+ in intel_plane_atomic_calc_changes()
/openbmc/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dazoteq,iqs7211.yaml76 azoteq,rate-lp1-ms:
110 azoteq,timeout-lp1-ms:
/openbmc/linux/arch/arm/kernel/
H A Dsetup.c210 #define lp1 io_res[1] macro
921 * possessing lp0, lp1 or lp2 in request_standard_resources()
926 request_resource(&ioport_resource, &lp1); in request_standard_resources()
/openbmc/linux/Documentation/admin-guide/
H A Dparport.rst222 the first parallel port, and /dev/lp1 to be the **third** parallel port,
H A Ddevices.txt168 1 = /dev/lp1 Parallel printer on parport1
976 1 = /dev/pd_bdm1 PD BDM interface on lp1
979 5 = /dev/icd_bdm1 ICD BDM interface on lp1
H A Dkernel-parameters.txt3005 lp=port[,port...] lp=none,parport0 (lp0 not configured, lp1 uses
/openbmc/linux/drivers/clk/
H A Dclk-si514.c122 /* Calculate LP1/LP2 according to table 13 in the datasheet */ in si514_set_muldiv()
/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml92 Mode 1 is for LP1, CPU voltage off and DRAM in self-refresh
/openbmc/linux/drivers/soc/tegra/fuse/
H A Dfuse-tegra.c237 * from LP1 system suspend and as part of CCPLEX cluster switching. in tegra_fuse_suspend()
/openbmc/linux/drivers/char/
H A Dlp.c44 * lp=parport1,none,parport2 (bind lp0 to parport1, disable lp1 and
72 * lp1 0x378
/openbmc/linux/drivers/scsi/isci/
H A Dport_config.c154 * -> (PE0), (PE0, PE1), (PE0, PE1, PE2, PE3) LP1 -> (PE1) LP2 -> (PE2), (PE2,
/openbmc/linux/drivers/input/touchscreen/
H A Diqs7211.c663 .name = "azoteq,rate-lp1-ms",
711 .name = "azoteq,timeout-lp1-ms",
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-transformer-common.dtsi1359 /* FIXME: LP1 doesn't work at the moment */
/openbmc/linux/drivers/gpu/drm/vc4/
H A Dvc4_dsi.c1511 DSI_PORT_BIT(INT_ERR_CONT_LP1), "LP1 contention"); in vc4_dsi_irq_handler()
/openbmc/linux/drivers/soc/tegra/
H A Dpmc.c374 * LP0 or SC7). Wakeup from other sleep states (such as LP1 or LP2)