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/openbmc/linux/Documentation/devicetree/bindings/ptp/
H A Dptp-idtcm.yaml7 title: IDT ClockMatrix (TM) PTP Clock
16 - idt,8a34000
17 - idt,8a34001
18 - idt,8a34002
19 - idt,8a34003
20 - idt,8a34004
21 - idt,8a34005
22 - idt,8a34006
23 - idt,8a34007
24 - idt,8a34008
[all …]
H A Dptp-idt82p33.yaml7 title: IDT 82P33 PTP Clock
10 IDT 82P33XXX Synchronization Management Unit (SMU) based PTP clock
18 - idt,82p33810
19 - idt,82p33813
20 - idt,82p33814
21 - idt,82p33831
22 - idt,82p33910
23 - idt,82p33913
24 - idt,82p33914
25 - idt,82p33931
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Didt,versaclock5.yaml4 $id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
7 title: IDT VersaClock 5 and 6 programmable I2C clock generators
10 The IDT VersaClock 5 and VersaClock 6 are programmable I2C
33 The idt,shutdown and idt,output-enable-active properties control the
53 - idt,5p49v5923
54 - idt,5p49v5925
55 - idt,5p49v5933
56 - idt,5p49v5935
57 - idt,5p49v60
58 - idt,5p49v6901
[all …]
/openbmc/linux/drivers/misc/eeprom/
H A Didt_89hpesx.c5 * IDT PCIe-switch NTB Linux driver
11 * NOTE of the IDT 89HPESx SMBus-slave interface driver
13 * IDT PCIe-switches. IDT provides a simple SMBus interface to perform IO-
20 * Additionally IDT 89HPESx SMBus interface has an ability to write/read
55 #define IDT_89HPESX_DESC "IDT 89HPESx SMBus-slave interface driver"
69 * struct idt_89hpesx_dev - IDT 89HPESx device data structure
70 * @eesize: Size of EEPROM in bytes (calculated from "idt,eecompatible")
111 * struct idt_smb_seq - sequence of data to be read/written from/to IDT 89HPESx
139 * @csraddr: Internal IDT device CSR address
223 * IDT 89HPESx basic register
[all …]
/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Didt,89hpesx.yaml4 $id: http://devicetree.org/schemas/misc/idt,89hpesx.yaml#
7 title: EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices
16 pattern: '^idt,89hpes'
23 - pattern: '^idt,89hpes(8nt2|12nt3|12n3a?|24n3a?|(12|24)t3g2|4t4g2|10t4g2|[56]t5|8t5a?)$'
24 - pattern: '^idt,89hpes(6t6g2|16t7|(24t6|32t8|48t12|16t4a?)(g2)?)$'
25 - pattern: '^idt,89hpes(24nt6a|32nt8[ab]|12nt12|16nt16|24nt24|32nt24[ab])g2$'
26 - pattern: '^idt,89hpes((32h8|48h12a?|22h16|34h16|64h16a?)(g2)?|16h16)$'
59 idt@74 {
60 compatible = "idt,89hpes32nt8ag2";
/openbmc/u-boot/board/freescale/common/
H A Didt8t49n222a_serdes_clk.c18 printf("IDT:0x%x could not read status register from device.\n", in check_pll_status()
40 debug("IDT:Configuring idt8t49n222a device at I2C address: 0x%2x\n", in set_serdes_refclk()
45 debug("IDT:0x%x could not read DEV_ID from device.\n", in set_serdes_refclk()
51 debug("IDT: device at address 0x%x is not idt8t49n222a.\n", in set_serdes_refclk()
91 /* Configuring IDT for output refclks as in set_serdes_refclk()
116 /* Configuring IDT for output refclks as in set_serdes_refclk()
124 /* Configuring IDT for output refclks as in set_serdes_refclk()
133 /* Configuring IDT for output refclks as in set_serdes_refclk()
141 /* Configuring IDT for output refclks as in set_serdes_refclk()
152 /* Configuring IDT for output refclks as in set_serdes_refclk()
[all …]
H A Didt8t49n222a_serdes_clk.h29 /* configuration values for IDT registers for Output Refclks:
41 /* configuration values for IDT registers for Output Refclks:
52 /* Reconfiguration values for some of IDT registers for
62 /* configuration values for IDT registers for Output Refclks:
70 /* configuration values for IDT registers for Output Refclks:
78 /* configuration values for IDT registers for Output Refclks:
86 /* configuration values for IDT registers for Output Refclks:
94 /* configuration values for IDT registers for Output Refclks:
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-rapidio36 Alexandre Bounine <alexandre.bounine@idt.com>
44 Alexandre Bounine <alexandre.bounine@idt.com>
52 Alexandre Bounine <alexandre.bounine@idt.com>
60 Alexandre Bounine <alexandre.bounine@idt.com>
68 Alexandre Bounine <alexandre.bounine@idt.com>
77 Alexandre Bounine <alexandre.bounine@idt.com>
86 Alexandre Bounine <alexandre.bounine@idt.com>
95 Alexandre Bounine <alexandre.bounine@idt.com>
104 Alexandre Bounine <alexandre.bounine@idt.com>
112 Alexandre Bounine <alexandre.bounine@idt.com>
[all …]
/openbmc/linux/arch/x86/kernel/
H A Didt.c78 * The default IDT entries which are set up in trap_init() before
127 * The APIC and SMP idt entries
165 /* Must be page-aligned because the real IDT is used in the cpu entry area */
187 idt_setup_from_table(gate_desc *idt, const struct idt_data *t, int size, bool sys) in idt_setup_from_table() argument
193 write_idt_entry(idt, t->vector, &desc); in idt_setup_from_table()
209 * idt_setup_early_traps - Initialize the idt table with early traps
223 * idt_setup_traps - Initialize the idt table with default traps
240 * idt_setup_early_pf - Initialize the idt table with early pagefault handler
261 * Set the IDT descriptor to a fixed read-only location in the cpu in idt_map_in_cea()
263 * location of the kernel, and to defend the IDT against arbitrary in idt_map_in_cea()
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dbeacon-renesom-som.dtsi164 compatible = "idt,5p49v6965";
178 idt,mode = <VC5_CMOS>;
179 idt,voltage-microvolt = <1800000>;
180 idt,slew-percent = <100>;
184 idt,mode = <VC5_CMOS>;
185 idt,voltage-microvolt = <1800000>;
186 idt,slew-percent = <100>;
190 idt,mode = <VC5_CMOS>;
191 idt,voltage-microvolt = <1800000>;
192 idt,slew-percent = <100>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Didt,3243x-emac.yaml4 $id: http://devicetree.org/schemas/net/idt,3243x-emac.yaml#
7 title: IDT 79rc3243x Ethernet controller
9 description: Ethernet controller integrated into IDT 79RC3243x family SoCs
19 const: idt,3243x-emac
60 compatible = "idt,3243x-emac";
/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dsvm_nested_shutdown_test.c20 static void l1_guest_code(struct svm_test_data *svm, struct idt_entry *idt) in l1_guest_code() argument
31 idt[6].p = 0; // #UD is intercepted but its injection will cause #NP in l1_guest_code()
32 idt[11].p = 0; // #NP is not intercepted and will cause another in l1_guest_code()
34 idt[8].p = 0; // #DF will cause #NP which will cause SHUTDOWN in l1_guest_code()
56 vcpu_args_set(vcpu, 2, svm_gva, vm->idt); in main()
/openbmc/linux/drivers/rapidio/switches/
H A DKconfig6 tristate "IDT CPS-xx SRIO switches support"
8 Includes support for IDT CPS-16/12/10/8 serial RapidIO switches.
11 tristate "IDT CPS Gen.2 SRIO switch support"
17 tristate "IDT RXS Gen.3 SRIO switch support"
/openbmc/linux/drivers/ntb/hw/idt/
H A Dntb_hw_idt.c36 * IDT PCIe-switch NTB Linux driver
65 #define NTB_DESC "IDT PCI-E Non-Transparent Bridge Driver"
241 * IDT PCIe-switch partitions table with the corresponding control, status
277 * 1. IDT PCIe-switch registers IO-functions
279 * Beside ordinary configuration space registers IDT PCIe-switch expose
282 * Additionally all the configuration space registers of all the IDT
287 * provide IDT NTB hardware descriptor and a register address.
293 * @ndev: IDT NTB hardware driver descriptor
297 * IDT PCIe-switch registers are all Little endian.
315 * @ndev: IDT NTB hardware driver descriptor
[all …]
H A Dntb_hw_idt.h36 * IDT PCIe-switch NTB Linux driver
55 * the supported IDT PCIe-switches
66 * IDT PCIe-switches device IDs
79 * NOTE 1) The IDT PCIe-switch internal data is little-endian
107 /* IDT Proprietary NT-port-specific registers */
194 * IDT PCIe-switch Global Configuration and Status registers
437 /* IDT PCIe-switch control register (DWORD) */
970 * Number of IDT NTB resources:
980 * General IDT PCIe-switch constant
981 * @IDT_MAX_NR_PORTS: Maximum number of ports per IDT PCIe-switch
[all …]
/openbmc/linux/arch/powerpc/kvm/
H A De500.c122 vcpu_e500->idt = kzalloc(sizeof(struct vcpu_id_table), GFP_KERNEL); in kvmppc_e500_id_table_alloc()
123 return vcpu_e500->idt; in kvmppc_e500_id_table_alloc()
128 kfree(vcpu_e500->idt); in kvmppc_e500_id_table_free()
129 vcpu_e500->idt = NULL; in kvmppc_e500_id_table_free()
152 memset(vcpu_e500->idt, 0, sizeof(struct vcpu_id_table)); in kvmppc_e500_id_table_reset_all()
163 struct vcpu_id_table *idt = vcpu_e500->idt; in kvmppc_e500_id_table_reset_one() local
169 idt->id[as][pid][pr].val = 0; in kvmppc_e500_id_table_reset_one()
170 idt->id[as][pid][pr].pentry = NULL; in kvmppc_e500_id_table_reset_one()
189 struct vcpu_id_table *idt = vcpu_e500->idt; in kvmppc_e500_get_sid() local
196 sid = local_sid_lookup(&idt->id[as][gid][pr]); in kvmppc_e500_get_sid()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Didt,32434-pic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/idt,32434-pic.yaml#
7 title: IDT 79RC32434 Interrupt Controller
20 const: idt,32434-pic
42 compatible = "idt,32434-pic";
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Didt,32434-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/idt,32434-gpio.yaml#
7 title: IDT 79RC32434 GPIO controller
14 const: idt,32434-gpio
53 compatible = "idt,32434-gpio";
/openbmc/linux/arch/x86/boot/compressed/
H A Didt_64.c30 /* Setup IDT before kernel jumping to .Lrelocated */
43 * Setup IDT after kernel jumping to .Lrelocated.
50 * IDT is loaded and there the #VC IDT entry gets setup too.
88 /* Set a null-idt, disabling #PF and #VC handling */ in cleanup_exception_handling()
H A Dmem_encrypt.S180 * Write an IDT entry into boot32_idt
186 * %ecx: IDT address
189 /* IDT entry address to %ecx */
192 /* Build IDT entry, lower 4 bytes */
197 /* Store lower 4 bytes to IDT */
200 /* Build IDT entry, upper 4 bytes */
205 /* Store upper 4 bytes to IDT */
226 /* Load IDT */
/openbmc/linux/Documentation/devicetree/bindings/hwmon/
H A Djedec,jc42.yaml30 - idt,tse2002
31 - idt,tse2004
32 - idt,ts3000
33 - idt,ts3001
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dmc5.c46 /* IDT 75P52100 commands */
52 /* IDT LAR register address and value for 144-bit mode (low 32 bits) */
56 /* IDT SCR and SSR addresses (low 32 bits) */
61 /* IDT GMR base address (low 32 bits) */
64 /* IDT data and mask array base addresses (low 32 bits) */
68 /* IDT 75N43102 commands */
73 /* IDT 75N43102 SCR address (low 32 bits) */
76 /* IDT 75N43102 GMR base addresses (low 32 bits) */
81 /* IDT 75N43102 data and mask array base addresses (low 32 bits) */
189 /* Set DBGI command mode for IDT TCAM. */ in init_idt52100()
[all …]
/openbmc/linux/arch/x86/include/asm/
H A Dirq_vectors.h9 * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
16 * IDT entries:
24 * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
33 * IDT vectors usable for external interrupt sources start at 0x20.
/openbmc/linux/tools/arch/x86/include/asm/
H A Dirq_vectors.h9 * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
16 * IDT entries:
24 * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
33 * IDT vectors usable for external interrupt sources start at 0x20.
/openbmc/linux/drivers/ptp/
H A DKconfig135 tristate "IDT 82P33xxx PTP clock"
139 This driver adds support for using the IDT 82P33xxx as a PTP
141 is connected to the IDT chip.
147 tristate "IDT CLOCKMATRIX as PTP clock"
151 This driver adds support for using IDT CLOCKMATRIX(TM) as a PTP
153 is connected to the IDT chip.

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