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/openbmc/qemu/util/
H A Dint128.c42 uint64_t hi, lo, tmp; in divrem128() local
43 int s = clz64(v.hi); in divrem128()
47 hi = u.hi; in divrem128()
49 tmp = divu128(&lo, &hi, v.lo); in divrem128()
50 *q = int128_make128(lo, hi); in divrem128()
53 hi = int128_gethi(int128_lshift(v, s)); in divrem128()
55 if (hi > u.hi) { in divrem128()
57 tmp = u.hi; in divrem128()
58 divu128(&lo, &tmp, hi); in divrem128()
62 tmp = u.hi - hi; in divrem128()
[all …]
/openbmc/qemu/include/qemu/
H A Dint128.h25 static inline Int128 int128_make128(uint64_t lo, uint64_t hi) in int128_make128() argument
27 return (__uint128_t)hi << 64 | lo; in int128_make128()
240 int64_t hi; member
244 int64_t hi;
250 return (Int128) { .lo = a, .hi = 0 }; in int128_make64()
255 return (Int128) { .lo = a, .hi = a >> 63 }; in int128_makes64()
258 static inline Int128 int128_make128(uint64_t lo, uint64_t hi) in int128_make128() argument
260 return (Int128) { .lo = lo, .hi = hi }; in int128_make128()
265 assert(!a.hi); in int128_get64()
276 return a.hi; in int128_gethi()
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/openbmc/openbmc/poky/bitbake/contrib/vim/syntax/
H A Dbitbake.vim105 hi def link bbUnmatched Error
106 hi def link bbInclude Include
107 hi def link bbTodo Todo
108 hi def link bbComment Comment
109 hi def link bbQuote String
110 hi def link bbString String
111 hi def link bbDelimiter Keyword
112 hi def link bbArrayBrackets Statement
113 hi def link bbContinue Special
114 hi def link bbExport Type
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/openbmc/qemu/tests/tcg/mips/user/isa/r5900/
H A Dtest_r5900_maddu.c12 uint32_t hi = a >> 32; in maddu() local
22 : "=r" (rd), "=r" (lo), "=r" (hi) in maddu()
23 : "r" (rs), "r" (rt), "r" (lo), "r" (hi)); in maddu()
24 r = ((uint64_t)hi << 32) | (uint32_t)lo; in maddu()
35 uint32_t hi = a >> 32; in maddu1() local
45 : "=r" (rd), "=r" (lo), "=r" (hi) in maddu1()
46 : "r" (rs), "r" (rt), "r" (lo), "r" (hi)); in maddu1()
47 r = ((uint64_t)hi << 32) | (uint32_t)lo; in maddu1()
H A Dtest_r5900_madd.c12 int32_t hi = a >> 32; in madd() local
22 : "=r" (rd), "=r" (lo), "=r" (hi) in madd()
23 : "r" (rs), "r" (rt), "r" (lo), "r" (hi)); in madd()
24 r = ((int64_t)hi << 32) | (uint32_t)lo; in madd()
35 int32_t hi = a >> 32; in madd1() local
45 : "=r" (rd), "=r" (lo), "=r" (hi) in madd1()
46 : "r" (rs), "r" (rt), "r" (lo), "r" (hi)); in madd1()
47 r = ((int64_t)hi << 32) | (uint32_t)lo; in madd1()
H A Dtest_r5900_multu.c11 uint32_t rd, lo, hi; in multu() local
18 : "=r" (rd), "=r" (lo), "=r" (hi) in multu()
20 r = ((uint64_t)hi << 32) | (uint32_t)lo; in multu()
30 uint32_t rd, lo, hi; in multu1() local
37 : "=r" (rd), "=r" (lo), "=r" (hi) in multu1()
39 r = ((uint64_t)hi << 32) | (uint32_t)lo; in multu1()
H A Dtest_r5900_mult.c11 int32_t rd, lo, hi; in mult() local
18 : "=r" (rd), "=r" (lo), "=r" (hi) in mult()
20 r = ((int64_t)hi << 32) | (uint32_t)lo; in mult()
30 int32_t rd, lo, hi; in mult1() local
37 : "=r" (rd), "=r" (lo), "=r" (hi) in mult1()
39 r = ((int64_t)hi << 32) | (uint32_t)lo; in mult1()
H A Dtest_r5900_mflohi1.c13 int64_t lo, hi, lo1, hi1; in main() local
16 /* Test both LO/HI and LO1/HI1 to verify separation. */ in main()
24 : "=r" (lo), "=r" (hi), in main()
28 r = ((int64_t)hi << 32) | (uint32_t)lo; in main()
H A Dtest_r5900_divu1.c13 uint32_t lo, hi; in divu1() local
19 : "=r" (lo), "=r" (hi) in divu1()
23 assert(rs % rt == hi); in divu1()
25 return (struct quotient_remainder) { .quotient = lo, .remainder = hi }; in divu1()
H A Dtest_r5900_div1.c13 int32_t lo, hi; in div1() local
19 : "=r" (lo), "=r" (hi) in div1()
23 assert(rs % rt == hi); in div1()
25 return (struct quotient_remainder) { .quotient = lo, .remainder = hi }; in div1()
/openbmc/u-boot/arch/nios2/cpu/
H A Dstart.S34 movhi r5, %hi(ICACHE_SIZE_MAX)
47 movhi et, %hi(_exception)
63 movhi r5, %hi(DCACHE_SIZE_MAX)
77 _cur: movhi r5, %hi(_cur - _start)
81 movhi r5, %hi(_start)
86 movhi r6, %hi(CONFIG_SYS_MONITOR_LEN)
97 movhi r4, %hi(_reloc)
110 movhi r2, %hi(debug_uart_init@h)
117 movhi r2, %hi(board_init_f_alloc_reserve@h)
122 movhi r2, %hi(board_init_f_init_reserve@h)
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/openbmc/qemu/target/mips/tcg/
H A Dvr54xx_translate.c22 * MACCHI Multiply, accumulate, and move HI
23 * MACCHIU Unsigned multiply, accumulate, and move HI
26 * MSACHI Multiply, negate, accumulate, and move HI
27 * MSACHIU Unsigned multiply, negate, accumulate, and move HI
29 * MULHI Multiply and move HI
30 * MULHIU Unsigned multiply and move HI
32 * MULSHI Multiply, negate, and move HI
33 * MULSHIU Unsigned multiply, negate, and move HI
/openbmc/openbmc/poky/meta/recipes-devtools/python/python3-hypothesis/
H A Dtest_binary_search.py54 # Invariant: There is an insertion point i with i <= hi
55 hi = len(ls)
56 while lo + 1 < hi:
57 mid = (lo + hi) // 2
69 # < hi. Either way, mid is a valid new hi.
70 hi = mid
71 assert lo + 1 == hi
72 # We now know that there is a valid insertion point <= hi and there is no
73 # valid insertion point < hi because hi - 1 is lo. Therefore hi is the
75 return hi
/openbmc/u-boot/arch/x86/cpu/broadwell/
H A Dcpu.c109 if ((platform_info.hi >> 1) & 3) { in set_max_freq()
119 perf_ctl.hi = 0; in set_max_freq()
242 msr.hi &= 0xc0000000; in initialize_vr_config()
243 msr.hi |= (0x01 << (52 - 32)); /* PSI3 threshold - 1A */ in initialize_vr_config()
244 msr.hi |= (0x05 << (42 - 32)); /* PSI2 threshold - 5A */ in initialize_vr_config()
245 msr.hi |= (0x14 << (32 - 32)); /* PSI1 threshold - 20A */ in initialize_vr_config()
246 msr.hi |= (1 << (62 - 32)); /* Enable PSI4 */ in initialize_vr_config()
253 msr.hi &= ~(0x3ff << (40 - 32)); in initialize_vr_config()
254 msr.hi |= (0x200 << (40 - 32)); /* 1.0 */ in initialize_vr_config()
256 msr.hi &= ~0xff; in initialize_vr_config()
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/openbmc/phosphor-hwmon/
H A Dthresholds.hpp79 auto hi = (*realIface.*Thresholds<T>::getHi)(); in checkThresholds() local
83 (*realIface.*Thresholds<T>::alarmHi)(value >= hi); in checkThresholds()
95 if (alarmHighState != (value >= hi)) in checkThresholds()
97 if (value >= hi) in checkThresholds()
156 auto hi = stod(tHi) * std::pow(10, scale); in addThreshold() local
157 (*iface.*Thresholds<T>::setHi)(hi); in addThreshold()
159 (*iface.*Thresholds<T>::alarmHi)(value >= hi); in addThreshold()
160 if (alarmHighState != (value >= hi)) in addThreshold()
162 if (value >= hi) in addThreshold()
/openbmc/u-boot/arch/x86/cpu/ivybridge/
H A Dmodel_206ax.c54 msr.hi = 0; in enable_vmx()
154 return (platform_info.hi >> 1) & 3; in cpu_config_tdp_levels()
183 max_power = msr.hi & 0x7fff; in set_power_limits()
184 max_time = (msr.hi >> 16) & 0x7f; in set_power_limits()
207 limit.hi = 0; in set_power_limits()
208 limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK; in set_power_limits()
209 limit.hi |= PKG_POWER_LIMIT_EN; in set_power_limits()
217 limit.hi = 0; in set_power_limits()
254 msr.hi = 0; in configure_c_states()
259 msr.hi = 0; in configure_c_states()
[all …]
/openbmc/u-boot/arch/riscv/lib/
H A Drdtime.c24 u32 lo, hi, tmp; in riscv_get_time()
32 : "=&r" (hi), "=&r" (lo), "=&r" (tmp)); in riscv_get_time()
34 *time = ((u64)hi << 32) | lo; in riscv_get_time()
/openbmc/u-boot/lib/bzip2/
H A Dbzlib_blocksort.c75 Int32 hi ) in fallbackSimpleSort() argument
80 if (lo == hi) return; in fallbackSimpleSort()
82 if (hi - lo > 3) { in fallbackSimpleSort()
83 for ( i = hi-4; i >= lo; i-- ) { in fallbackSimpleSort()
86 for ( j = i+4; j <= hi && ec_tmp > eclass[fmap[j]]; j += 4 ) in fallbackSimpleSort()
92 for ( i = hi-1; i >= lo; i-- ) { in fallbackSimpleSort()
95 for ( j = i+1; j <= hi && ec_tmp > eclass[fmap[j]]; j++ ) in fallbackSimpleSort()
139 Int32 sp, lo, hi; in fallbackQSort3() local
153 fpop ( lo, hi ); in fallbackQSort3()
154 if (hi - lo < FALLBACK_QSORT_SMALL_THRESH) { in fallbackQSort3()
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/openbmc/u-boot/arch/arc/lib/
H A Dlibgcc2.h34 typedef int HItype __attribute__ ((mode (HI)));
35 typedef unsigned int UHItype __attribute__ ((mode (HI)));
91 #define __NW(a,b) __gnu_ ## a ## hi ## b
94 #define __NW(a,b) __ ## a ## hi ## b
107 #define __NDW(a,b) __gnu_ ## a ## hi ## b
110 #define __NDW(a,b) __ ## a ## hi ## b
/openbmc/u-boot/board/freescale/ls2080a/
H A Dddr.h27 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
39 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
50 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
63 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
/openbmc/qemu/tests/tcg/tricore/c/
H A Dcrt0-tc2x.S57 movh.a %sp,hi:__USTACK # load %sp
59 movh %d0,hi:__ISTACK # load $isp
66 movh %d0,hi:first_trap_table #; load $btv
96 movh.a %a0,hi:_SMALL_DATA_ # %a0 addresses .sdata/.sbss
98 movh.a %a1,hi:_SMALL_DATA2_ # %a1 addresses .sdata2/.sbss2
100 movh.a %a8,hi:_SMALL_DATA3_ # %a8 addresses .sdata3/.sbss3
102 movh.a %a9,hi:_SMALL_DATA4_ # %a9 addresses .sdata4/.sbss4
163 movh %d0,hi:__CSA_BEGIN #; %d0 = begin of CSA
167 movh %d2,hi:__CSA_END #; %d2 = end of CSA
213 movh.a %a13,hi:__clear_table # %a13 = &first table entry
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/openbmc/u-boot/board/freescale/ls2080aqds/
H A Dddr.h27 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
41 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
54 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
68 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
/openbmc/qemu/tests/tcg/ppc64/
H A Dxxspltw.c14 #define TEST(HI, LO, UIM, RES) \ argument
19 } h = { .u = HI }, l = { .u = LO }; \
33 " %016" PRIx64 "%016" PRIx64 "\n", HI, LO, UIM, \
/openbmc/u-boot/include/linux/
H A Dkernel.h203 * @hi: highest allowable value
205 * This macro does strict typechecking of lo/hi to make sure they are of the
208 #define clamp(val, lo, hi) min((typeof(val))max(val, lo), hi) argument
231 * @hi: maximum allowable value
236 #define clamp_t(type, val, lo, hi) min_t(type, max_t(type, val, lo), hi) argument
242 * @hi: maximum allowable value
249 #define clamp_val(val, lo, hi) clamp_t(typeof(val), val, lo, hi) argument
/openbmc/qemu/hw/i386/
H A Dtrace-events7 vtd_inv_desc(const char *type, uint64_t hi, uint64_t lo) "invalidate desc type %s high 0x%"PRIx64" …
19 vtd_inv_desc_wait_write_fail(uint64_t hi, uint64_t lo) "write fail for wait desc hi 0x%"PRIx64" lo …
35 …nt16_t domain, uint64_t hi, uint64_t lo) "%s: replay valid context device %02"PRIx8":%02"PRIx8".%0…
60 vtd_ir_irte_get(int index, uint64_t lo, uint64_t hi) "index %d low 0x%"PRIx64" high 0x%"PRIx64
67 vtd_frr_new(int index, uint64_t hi, uint64_t lo) "index %d high 0x%"PRIx64" low 0x%"PRIx64
112 amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) "hi 0x%"PRIx64" lo 0x%"PRIx64

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