Home
last modified time | relevance | path

Searched full:hsp (Results 1 – 25 of 57) sorted by relevance

123

/openbmc/linux/drivers/mailbox/
H A Dtegra-hsp.c17 #include <dt-bindings/mailbox/tegra186-hsp.h>
64 struct tegra_hsp *hsp; member
126 static inline u32 tegra_hsp_readl(struct tegra_hsp *hsp, unsigned int offset) in tegra_hsp_readl() argument
128 return readl(hsp->regs + offset); in tegra_hsp_readl()
131 static inline void tegra_hsp_writel(struct tegra_hsp *hsp, u32 value, in tegra_hsp_writel() argument
134 writel(value, hsp->regs + offset); in tegra_hsp_writel()
159 __tegra_hsp_doorbell_get(struct tegra_hsp *hsp, unsigned int master) in __tegra_hsp_doorbell_get() argument
163 list_for_each_entry(entry, &hsp->doorbells, list) in __tegra_hsp_doorbell_get()
171 tegra_hsp_doorbell_get(struct tegra_hsp *hsp, unsigned int master) in tegra_hsp_doorbell_get() argument
176 spin_lock_irqsave(&hsp->lock, flags); in tegra_hsp_doorbell_get()
[all …]
H A DMakefile48 obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dnvidia,tegra186-hsp.yaml4 $id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
7 title: NVIDIA Tegra Hardware Synchronization Primitives (HSP)
14 The HSP modules are used for the processors to share resources and
21 The features that HSP supported are shared mailboxes, shared
25 contain two cells. The first cell determines the HSP type and the
53 mailboxes may vary by instance of the HSP block and SoC
59 <dt-bindings/mailbox/tegra186-hsp.h>
63 pattern: "^hsp@[0-9a-f]+$"
67 - const: nvidia,tegra186-hsp
68 - const: nvidia,tegra194-hsp
[all …]
/openbmc/u-boot/doc/device-tree-bindings/mailbox/
H A Dnvidia,tegra186-hsp.txt1 NVIDIA Tegra Hardware Synchronization Primitives (HSP)
3 The HSP modules are used for the processors to share resources and communicate
9 The features that HSP supported are shared mailboxes, shared semaphores,
13 - name : Should be hsp
17 - "nvidia,tegra186-hsp"
33 contain two data. The first one should be the HSP type and the second
37 - <dt-bindings/mailbox/tegra186-hsp.h>.
41 hsp_top0: hsp@3c00000 {
42 compatible = "nvidia,tegra186-hsp";
/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml26 - .../mailbox/nvidia,tegra186-hsp.yaml
142 #include <dt-bindings/mailbox/tegra186-hsp.h>
145 hsp_top0: hsp@3c00000 {
146 compatible = "nvidia,tegra186-hsp";
201 #include <dt-bindings/mailbox/tegra186-hsp.h>
/openbmc/linux/drivers/video/fbdev/kyro/
H A DSTG4000VTG.c159 if ((pTiming->HSP > 0) && (pTiming->VSP < 0)) { /* +hsync -vsync */ in SetupVTG()
161 } else if ((pTiming->HSP < 0) && (pTiming->VSP > 0)) { /* -hsync +vsync */ in SetupVTG()
163 } else if ((pTiming->HSP < 0) && (pTiming->VSP < 0)) { /* -hsync -vsync */ in SetupVTG()
165 } else if ((pTiming->HSP > 0) && (pTiming->VSP > 0)) { /* +hsync -vsync */ in SetupVTG()
/openbmc/u-boot/drivers/mailbox/
H A DKconfig21 bool "Enable Tegra HSP controller support"
24 This enables support for the NVIDIA Tegra HSP Hw module, which
H A Dtegra-hsp.c10 #include <dt-bindings/mailbox/tegra186-hsp.h>
171 { .compatible = "nvidia,tegra186-hsp" },
184 .name = "tegra-hsp",
H A DMakefile9 obj-$(CONFIG_TEGRA_HSP) += tegra-hsp.o
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx31.c39 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
62 clk[hsp] = imx_clk_divider("hsp", "mcu_main", base + MXC_CCM_PDR0, 11, 3); in _mx31_clocks_init()
102 clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MXC_CCM_CGR1, 22); in _mx31_clocks_init()
H A Dclk-imx35.c64 /* 0 */ ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, enumerator
125 pr_err("i.MX35 clk: illegal hsp clk selection 0x%x\n", hsp_sel); in _mx35_clocks_init()
129 clk[hsp] = imx_clk_fixed_factor("hsp", "arm", 1, hsp_div[hsp_sel]); in _mx35_clocks_init()
190 clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MX35_CCM_CGR1, 18); in _mx35_clocks_init()
/openbmc/u-boot/arch/arm/dts/
H A Dtegra186.dtsi5 #include <dt-bindings/mailbox/tegra186-hsp.h>
172 hsp: hsp@3c00000 { label
173 compatible = "nvidia,tegra186-hsp";
317 mboxes = <&hsp HSP_MBOX_TYPE_DB HSP_DB_MASTER_BPMP>;
/openbmc/linux/drivers/video/fbdev/
H A Dcarminefb.c63 u32 hsp; member
106 .hsp = 672,
118 .hsp = 864,
372 u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; in set_display_parameters() local
381 hsp = par->res->hsp - 1; in set_display_parameters()
394 (hsp)); in set_display_parameters()
/openbmc/u-boot/doc/device-tree-bindings/firmware/
H A Dnvidia,tegra186-bpmp.txt28 - .../mailbox/nvidia,tegra186-hsp.txt
69 hsp_top0: hsp@03c00000 {
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/bluealsa/
H A Dbluealsa_4.3.0.bb73 # Usually could choose profiles with it: a2dp-source a2dp-sink hfp-hf hfp-ag hsp-hs hsp-ag hfp-ofono
/openbmc/u-boot/include/dt-bindings/mailbox/
H A Dtegra186-hsp.h2 * This header provides constants for binding nvidia,tegra186-hsp.
/openbmc/linux/drivers/firmware/tegra/
H A DKconfig21 It needs HSP as the HW synchronization and notification module and
/openbmc/u-boot/arch/arm/cpu/arm1136/mx31/
H A Dgeneric.c61 /* hsp is the clock for the ipu */
77 printf("hsp clock : %dHz\n", mx31_get_hsp_clk()); in mx31_dump_clocks()
/openbmc/linux/include/dt-bindings/mailbox/
H A Dtegra186-hsp.h3 * This header provides constants for binding nvidia,tegra186-hsp.
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dnvidia,tegra194-tcu.yaml54 #include <dt-bindings/mailbox/tegra186-hsp.h>
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hpo_dp_stream_encoder.c203 uint8_t hsp; in dcn31_hpo_dp_stream_enc_set_stream_attribute() local
361 hsp = hw_crtc_timing.flags.HSYNC_POSITIVE_POLARITY ? 0 : 0x80; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
375 * MSA[7] = { HSP|HSW[14:8], VSP|VSW[14:8], 0, MISC1[ 7: 0]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
421 MSA_DATA_LANE_0, hsp | (hw_crtc_timing.h_sync_width >> 8), in dcn31_hpo_dp_stream_enc_set_stream_attribute()
/openbmc/linux/drivers/scsi/lpfc/
H A Dlpfc_nportdisc.c76 volatile struct serv_parm *hsp = &vport->fc_sparam; in lpfc_check_sparm() local
88 hsp_value = ((hsp->cls1.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
89 hsp->cls1.rcvDataSizeLsb); in lpfc_check_sparm()
96 hsp->cls1.rcvDataSizeLsb; in lpfc_check_sparm()
98 hsp->cls1.rcvDataSizeMsb; in lpfc_check_sparm()
105 hsp_value = ((hsp->cls2.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
106 hsp->cls2.rcvDataSizeLsb); in lpfc_check_sparm()
113 hsp->cls2.rcvDataSizeLsb; in lpfc_check_sparm()
115 hsp->cls2.rcvDataSizeMsb; in lpfc_check_sparm()
122 hsp_value = ((hsp->cls3.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
[all …]
/openbmc/linux/include/video/
H A Dkyro.h23 s32 HSP; /* Hor Sync Polarity */ member
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dimx31-clock.yaml26 hsp 7
H A Dimx35-clock.yaml24 hsp 5

123