169d52d89SAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 269d52d89SAnson Huang%YAML 1.2 369d52d89SAnson Huang--- 469d52d89SAnson Huang$id: http://devicetree.org/schemas/clock/imx31-clock.yaml# 569d52d89SAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml# 669d52d89SAnson Huang 7*33cd7c6fSKrzysztof Kozlowskititle: Freescale i.MX31 Clock Controller 869d52d89SAnson Huang 969d52d89SAnson Huangmaintainers: 10fb7acfe7SFabio Estevam - Fabio Estevam <festevam@gmail.com> 1169d52d89SAnson Huang 1269d52d89SAnson Huangdescription: | 1369d52d89SAnson Huang The clock consumer should specify the desired clock by having the clock 1469d52d89SAnson Huang ID in its "clocks" phandle cell. The following is a full list of i.MX31 1569d52d89SAnson Huang clocks and IDs. 1669d52d89SAnson Huang 1769d52d89SAnson Huang Clock ID 1869d52d89SAnson Huang ----------------------- 1969d52d89SAnson Huang dummy 0 2069d52d89SAnson Huang ckih 1 2169d52d89SAnson Huang ckil 2 2269d52d89SAnson Huang mpll 3 2369d52d89SAnson Huang spll 4 2469d52d89SAnson Huang upll 5 2569d52d89SAnson Huang mcu_main 6 2669d52d89SAnson Huang hsp 7 2769d52d89SAnson Huang ahb 8 2869d52d89SAnson Huang nfc 9 2969d52d89SAnson Huang ipg 10 3069d52d89SAnson Huang per_div 11 3169d52d89SAnson Huang per 12 3269d52d89SAnson Huang csi_sel 13 3369d52d89SAnson Huang fir_sel 14 3469d52d89SAnson Huang csi_div 15 3569d52d89SAnson Huang usb_div_pre 16 3669d52d89SAnson Huang usb_div_post 17 3769d52d89SAnson Huang fir_div_pre 18 3869d52d89SAnson Huang fir_div_post 19 3969d52d89SAnson Huang sdhc1_gate 20 4069d52d89SAnson Huang sdhc2_gate 21 4169d52d89SAnson Huang gpt_gate 22 4269d52d89SAnson Huang epit1_gate 23 4369d52d89SAnson Huang epit2_gate 24 4469d52d89SAnson Huang iim_gate 25 4569d52d89SAnson Huang ata_gate 26 4669d52d89SAnson Huang sdma_gate 27 4769d52d89SAnson Huang cspi3_gate 28 4869d52d89SAnson Huang rng_gate 29 4969d52d89SAnson Huang uart1_gate 30 5069d52d89SAnson Huang uart2_gate 31 5169d52d89SAnson Huang ssi1_gate 32 5269d52d89SAnson Huang i2c1_gate 33 5369d52d89SAnson Huang i2c2_gate 34 5469d52d89SAnson Huang i2c3_gate 35 5569d52d89SAnson Huang hantro_gate 36 5669d52d89SAnson Huang mstick1_gate 37 5769d52d89SAnson Huang mstick2_gate 38 5869d52d89SAnson Huang csi_gate 39 5969d52d89SAnson Huang rtc_gate 40 6069d52d89SAnson Huang wdog_gate 41 6169d52d89SAnson Huang pwm_gate 42 6269d52d89SAnson Huang sim_gate 43 6369d52d89SAnson Huang ect_gate 44 6469d52d89SAnson Huang usb_gate 45 6569d52d89SAnson Huang kpp_gate 46 6669d52d89SAnson Huang ipu_gate 47 6769d52d89SAnson Huang uart3_gate 48 6869d52d89SAnson Huang uart4_gate 49 6969d52d89SAnson Huang uart5_gate 50 7069d52d89SAnson Huang owire_gate 51 7169d52d89SAnson Huang ssi2_gate 52 7269d52d89SAnson Huang cspi1_gate 53 7369d52d89SAnson Huang cspi2_gate 54 7469d52d89SAnson Huang gacc_gate 55 7569d52d89SAnson Huang emi_gate 56 7669d52d89SAnson Huang rtic_gate 57 7769d52d89SAnson Huang firi_gate 58 7869d52d89SAnson Huang 7969d52d89SAnson Huangproperties: 8069d52d89SAnson Huang compatible: 8169d52d89SAnson Huang const: fsl,imx31-ccm 8269d52d89SAnson Huang 8369d52d89SAnson Huang reg: 8469d52d89SAnson Huang maxItems: 1 8569d52d89SAnson Huang 8669d52d89SAnson Huang interrupts: 8769d52d89SAnson Huang description: CCM provides 2 interrupt requests, request 1 is to generate 8869d52d89SAnson Huang interrupt for DVFS when a frequency change is requested, request 2 is 8969d52d89SAnson Huang to generate interrupt for DPTC when a voltage change is requested. 9069d52d89SAnson Huang items: 9169d52d89SAnson Huang - description: CCM DVFS interrupt request 1 9269d52d89SAnson Huang - description: CCM DPTC interrupt request 2 9369d52d89SAnson Huang 9469d52d89SAnson Huang '#clock-cells': 9569d52d89SAnson Huang const: 1 9669d52d89SAnson Huang 9769d52d89SAnson Huangrequired: 9869d52d89SAnson Huang - compatible 9969d52d89SAnson Huang - reg 10069d52d89SAnson Huang - interrupts 10169d52d89SAnson Huang - '#clock-cells' 10269d52d89SAnson Huang 10369d52d89SAnson HuangadditionalProperties: false 10469d52d89SAnson Huang 10569d52d89SAnson Huangexamples: 10669d52d89SAnson Huang - | 10769d52d89SAnson Huang clock-controller@53f80000 { 10869d52d89SAnson Huang compatible = "fsl,imx31-ccm"; 10969d52d89SAnson Huang reg = <0x53f80000 0x4000>; 11069d52d89SAnson Huang interrupts = <31>, <53>; 11169d52d89SAnson Huang #clock-cells = <1>; 11269d52d89SAnson Huang }; 113