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/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dmtk-sd.yaml94 hs400-ds-delay:
97 HS400 DS delay setting.
110 mediatek,hs400-cmd-int-delay:
113 HS400 command internal delay setting.
119 mediatek,hs400-cmd-resp-sel-rising:
122 HS400 command response sample selection.
123 If present, HS400 command responses are sampled on rising edges.
124 If not present, HS400 command responses are sampled on falling edges.
126 mediatek,hs400-ds-dly3:
134 value with corner IC and it is valid only for HS400 mode.
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H A Dnvidia,tegra20-sdhci.yaml100 The DQS trim values are only used on controllers which support HS400
101 timing. Only SDMMC4 on Tegra210 and Tegra186 supports HS400.
109 description: Specify DQS trim value for HS400 timing.
136 nvidia,pad-autocal-pull-down-offset-hs400:
137 description: Specify drive strength calibration offsets for HS400 mode.
158 and HS400 timing specific values are used in corresponding modes if
171 nvidia,pad-autocal-pull-up-offset-hs400:
172 description: Specify drive strength calibration offsets for HS400 mode.
H A Dsamsung,exynos-dw-mshc.yaml63 See also samsung,dw-mshc-hs400-timing property.
65 samsung,dw-mshc-hs400-timing:
75 The value of CIU TX and RX clock phase shift value for HS400 mode
97 See also samsung,dw-mshc-hs400-timing property.
102 RCLK (Data strobe) delay to control HS400 mode (Latency value for delay
H A Dmmc-controller.yaml215 mmc-hs400-1_2v:
218 eMMC HS400 mode (1.2V I/O) is supported.
220 mmc-hs400-1_8v:
223 eMMC HS400 mode (1.8V I/O) is supported.
225 mmc-hs400-enhanced-strobe:
228 eMMC HS400 enhanced strobe mode is supported
230 no-mmc-hs400:
233 All eMMC HS400 modes are not supported.
H A Dcdns,sdhci.yaml95 HS200, HS400 and HS400_ES.
102 Value of the delay introduced on the sdclk output for HS200, HS400 and
111 HS400 / HS400_ES speed modes.
154 mmc-hs400-1_8v;
H A Dsdhci-sprd.txt40 - sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing.
41 - sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing.
H A Dsdhci-am654.yaml121 ti,otap-del-sel-hs400:
122 description: Output tap delay for eMMC HS400 timing
190 description: strobe select delay for HS400 speed mode.
236 ti,otap-del-sel-hs400 = <0x0>;
H A Dbrcm,sdhci-brcmstb.yaml110 mmc-hs400-1_8v;
111 mmc-hs400-enhanced-strobe;
/openbmc/linux/drivers/mmc/host/
H A Dsdhci-acpi.c497 * while HS400 tuning is in progress we end up with mismatched driver in amd_select_drive_strength()
498 * strengths between the controller and the card. HS400 tuning requires in amd_select_drive_strength()
499 * switching from HS400->DDR52->HS->HS200->HS400. So the driver mismatch in amd_select_drive_strength()
507 * card's timing to HS200 or HS400. The card will use the default driver in amd_select_drive_strength()
528 * The initialization sequence for HS400 is:
529 * HS->HS200->Perform Tuning->HS->HS400
532 * HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400
534 * The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400
537 * HS400, we can re-enable the tuned clock.
562 /* DLL is only required for HS400 */ in amd_set_ios()
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H A Drenesas_sdhi.h17 u32 tap; /* sampling clock position for SDR104/HS400 (8 TAP) */
18 u32 tap_hs400_4tap; /* sampling clock position for HS400 (4 TAP) */
H A Dsdhci-xenon-phy.c348 * and before HS400 data strobe setting.
466 /* Set HS400 Data Strobe and Enhanced Strobe */
479 dev_dbg(mmc_dev(host->mmc), "starts HS400 strobe delay adjustment\n"); in xenon_emmc_phy_strobe_delay_adj()
489 * 1. card is in HS400 mode and in xenon_emmc_phy_strobe_delay_adj()
668 /* Hardware team recommend a value for HS400 */ in xenon_emmc_phy_set()
766 * HS400 set Data Strobe and Enhanced Strobe if it is supported.
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7885-jackpotlte.dts67 mmc-hs400-1_8v;
70 mmc-hs400-enhanced-strobe;
77 samsung,dw-mshc-hs400-timing = <0 2>;
H A Dexynos850-e850-96.dts140 mmc-hs400-1_8v;
143 mmc-hs400-enhanced-strobe;
150 samsung,dw-mshc-hs400-timing = <0 2>;
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso20 mmc-hs400-1_8v;
21 hs400-ds-delay = <0x14014>;
H A Dmt6795-sony-xperia-m5.dts139 mediatek,latch-ck = <0x14>; /* hs400 */
141 mediatek,hs400-cmd-int-delay = <1>;
142 mediatek,hs400-ds-dly3 = <0x1a>;
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-edgeble-neu6a.dtsi28 mmc-hs400-1_8v;
29 mmc-hs400-enhanced-strobe;
H A Drk3588s-khadas-edge2.dts28 mmc-hs400-1_8v;
29 mmc-hs400-enhanced-strobe;
H A Drk3399-nanopc-t4.dts113 mmc-hs400-1_8v;
114 mmc-hs400-enhanced-strobe;
/openbmc/u-boot/drivers/mmc/
H A Drenesas-sdhi.c116 bool hs400 = (mmc->selected_mode == MMC_HS_400); in renesas_sdhi_hs400() local
117 int ret, taps = hs400 ? priv->nrtaps : 8; in renesas_sdhi_hs400()
120 if (taps == 4) /* HS400 on 4tap SoC needs different clock */ in renesas_sdhi_hs400()
130 if (hs400) { in renesas_sdhi_hs400()
151 tmio_sd_writel(priv, hs400 ? 0x704 : 0x300, in renesas_sdhi_hs400()
454 /* HS400 is not supported on H3 ES1.x and M3W ES1.0,ES1.1 */ in renesas_sdhi_filter_caps()
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dipq9574-rdp418.dts70 mmc-hs400-1_8v;
71 mmc-hs400-enhanced-strobe;
H A Dipq9574-rdp433.dts81 mmc-hs400-1_8v;
82 mmc-hs400-enhanced-strobe;
/openbmc/linux/include/linux/mmc/
H A Dhost.h181 /* Prepare HS400 target operating frequency depending host driver */
184 /* Execute HS400 tuning depending host driver */
193 /* Prepare switch to DDR during the HS400 init sequence */
196 /* Prepare for switching from HS400 to HS200 */
199 /* Complete selection of HS400 */
408 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
409 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
/openbmc/linux/drivers/mmc/core/
H A Dhost.c261 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs400", in mmc_of_parse_clk_phase()
397 if (device_property_read_bool(dev, "mmc-hs400-1_8v")) in mmc_of_parse()
399 if (device_property_read_bool(dev, "mmc-hs400-1_2v")) in mmc_of_parse()
401 if (device_property_read_bool(dev, "mmc-hs400-enhanced-strobe")) in mmc_of_parse()
409 if (device_property_read_bool(dev, "no-mmc-hs400")) in mmc_of_parse()
628 dev_warn(dev, "drop HS400 support since no 8-bit bus\n"); in mmc_validate_host_caps()
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi148 sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
158 mmc-hs400-enhanced-strobe;
159 mmc-hs400-1_8v;
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77980a-condor-i.dts18 mmc-hs400-1_8v;

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