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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun4i-a10-gates-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#
7 title: Allwinner A10 Bus Gates Clock
24 - const: allwinner,sun4i-a10-gates-clk
25 - const: allwinner,sun4i-a10-axi-gates-clk
26 - const: allwinner,sun4i-a10-ahb-gates-clk
27 - const: allwinner,sun5i-a10s-ahb-gates-clk
28 - const: allwinner,sun5i-a13-ahb-gates-clk
29 - const: allwinner,sun7i-a20-ahb-gates-clk
30 - const: allwinner,sun6i-a31-ahb1-gates-clk
31 - const: allwinner,sun8i-a23-ahb1-gates-clk
[all …]
H A Dallwinner,sun8i-h3-bus-gates-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun8i-h3-bus-gates-clk.yaml#
7 title: Allwinner A10 Bus Gates Clock
23 const: allwinner,sun8i-h3-bus-gates-clk
59 compatible = "allwinner,sun8i-h3-bus-gates-clk";
/openbmc/linux/drivers/clk/sunxi/
H A Dclk-simple-gates.c91 CLK_OF_DECLARE(sun4i_a10_gates, "allwinner,sun4i-a10-gates-clk",
93 CLK_OF_DECLARE(sun4i_a10_apb0, "allwinner,sun4i-a10-apb0-gates-clk",
95 CLK_OF_DECLARE(sun4i_a10_apb1, "allwinner,sun4i-a10-apb1-gates-clk",
97 CLK_OF_DECLARE(sun4i_a10_axi, "allwinner,sun4i-a10-axi-gates-clk",
99 CLK_OF_DECLARE(sun5i_a10s_apb0, "allwinner,sun5i-a10s-apb0-gates-clk",
101 CLK_OF_DECLARE(sun5i_a10s_apb1, "allwinner,sun5i-a10s-apb1-gates-clk",
103 CLK_OF_DECLARE(sun5i_a13_apb0, "allwinner,sun5i-a13-apb0-gates-clk",
105 CLK_OF_DECLARE(sun5i_a13_apb1, "allwinner,sun5i-a13-apb1-gates-clk",
107 CLK_OF_DECLARE(sun6i_a31_ahb1, "allwinner,sun6i-a31-ahb1-gates-clk",
109 CLK_OF_DECLARE(sun6i_a31_apb1, "allwinner,sun6i-a31-apb1-gates-clk",
[all …]
H A DMakefile16 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-simple-gates.o
20 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun8i-bus-gates.o
30 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-apb0-gates.o
34 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN8I) += clk-sun6i-apb0-gates.o
H A Dclk-sun6i-apb0-gates.c7 * Allwinner A31 APB0 clock gates driver
30 { .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
31 { .compatible = "allwinner,sun8i-a23-apb0-gates-clk", .data = &sun8i_a23_apb0_gates },
93 .name = "sun6i-a31-apb0-gates-clk",
/openbmc/linux/drivers/clk/mvebu/
H A Dcommon.c193 struct clk **gates; member
211 to_clk_gate(__clk_get_hw(ctrl->gates[n])); in clk_gating_get_src()
213 return ctrl->gates[n]; in clk_gating_get_src()
266 /* Count, allocate, and register clock gates */ in mvebu_clk_gating_setup()
271 ctrl->gates = kcalloc(ctrl->num_gates, sizeof(*ctrl->gates), in mvebu_clk_gating_setup()
273 if (WARN_ON(!ctrl->gates)) in mvebu_clk_gating_setup()
279 ctrl->gates[n] = clk_register_gate(NULL, desc[n].name, parent, in mvebu_clk_gating_setup()
282 WARN_ON(IS_ERR(ctrl->gates[n])); in mvebu_clk_gating_setup()
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun5i.h41 /* AHB gates are exported */
42 /* APB0 gates are exported */
43 /* APB1 gates are exported */
47 /* DRAM gates are exported */
H A Dccu-sun4i-a10.h42 /* AHB gates are exported (23..68) */
43 /* APB0 gates are exported (69..78) */
44 /* APB1 gates are exported (79..95) */
46 /* DRAM gates are exported (129..142)*/
/openbmc/u-boot/drivers/clk/
H A Dclk_meson_axg.c27 static struct meson_gate gates[] = { variable
28 /* Everything Else (EE) domain gates */
38 /* Always On (AO) domain gates */
41 /* PLL Gates */
46 /* Peripheral Gates */
56 if (clk->id >= ARRAY_SIZE(gates)) in meson_set_gate()
59 gate = &gates[clk->id]; in meson_set_gate()
268 if (gates[id].reg != 0) { in meson_clk_get_rate_by_id()
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3228-cru.h16 /* sclk gates (special clocks) */
55 /* dclk gates */
59 /* aclk gates */
65 /* pclk gates */
87 /* hclk gates */
H A Drk3036-cru.h16 /* sclk gates (special clocks) */
52 /* aclk gates */
60 /* pclk gates */
80 /* hclk gates */
H A Drk3128-cru.h15 /* sclk gates (special clocks) */
52 /* aclk gates */
60 /* pclk gates */
83 /* hclk gates */
H A Drk3328-cru.h17 /* sclk gates (special clocks) */
92 /* dclk gates */
99 /* aclk gates */
129 /* pclk gates */
166 /* hclk gates */
H A Dsun4i-a10-ccu.h50 /* AHB Gates */
95 /* APB0 Gates */
107 /* APB1 Gates */
162 /* DRAM Gates */
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-gate.yaml14 to the i2c bus. Gates are similar to arbitrators in that you need to perform
16 there are no competing masters to consider for gates and therefore there is
17 no arbitration happening for gates.
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3368.c651 /* aclk_cci_pre gates */
658 /* aclkm_core_* gates */
662 /* armclk* gates */
666 /* sclk_cs_pre gates */
671 /* aclk_bus gates */
679 /* sclk_ddr gates */
684 /* fclk_mcu_src gates */
689 /* hclk_cpu gates */
698 /* pclk_cpu gates */
712 * video clk gates
[all …]
/openbmc/linux/include/dt-bindings/clock/
H A Drk3228-cru.h17 /* sclk gates (special clocks) */
69 /* dclk gates */
73 /* aclk gates */
92 /* pclk gates */
119 /* hclk gates */
H A Drk3128-cru.h19 /* sclk gates (special clocks) */
70 /* dclk gates */
74 /* aclk gates */
90 /* pclk gates */
120 /* hclk gates */
H A Drk3036-cru.h16 /* sclk gates (special clocks) */
51 /* aclk gates */
59 /* pclk gates */
80 /* hclk gates */
H A Dpx30-cru.h15 /* sclk gates (special clocks) */
91 /* dclk gates */
95 /* aclk gates */
115 /* hclk gates */
142 /* pclk gates */
H A Drk3328-cru.h18 /* sclk gates (special clocks) */
93 /* dclk gates */
100 /* aclk gates */
130 /* pclk gates */
169 /* hclk gates */
H A Dsun4i-a10-ccu.h50 /* AHB Gates */
95 /* APB0 Gates */
107 /* APB1 Gates */
162 /* DRAM Gates */
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dccu.h60 * @gates: clock gates
64 const struct ccu_clk_gate *gates; member
/openbmc/linux/Documentation/driver-api/nfc/
H A Dnfc-hci.rst38 support proprietary gates. This is the reason why the driver will pass a list
39 of proprietary gates that must be part of the session. HCI will ensure all
40 those gates have pipes connected when the hci device is set up.
41 In case the chip supports pre-opened gates and pseudo-static pipes, the driver
44 HCI Gates and Pipes
49 implementation, pipes are totally hidden. The public API only knows gates.
50 This is consistent with the driver need to send commands to proprietary gates
96 mode. This must be implemented only if the hardware uses proprietary gates or a
/openbmc/linux/drivers/mfd/
H A Dsun6i-prcm.c60 .name = "sun6i-a31-apb0-gates-clk",
61 .of_compatible = "allwinner,sun6i-a31-apb0-gates-clk",
87 .name = "sun6i-a31-apb0-gates-clk",
88 .of_compatible = "allwinner,sun8i-a23-apb0-gates-clk",

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