/openbmc/linux/Documentation/ABI/removed/ |
H A D | sysfs-bus-nfit | 7 read-modify-write cycle at the memory controller. 13 Uncorrectable Error Range Length Unit Size' (see: ACPI 6.2 14 section 9.20.7.4 Function Index 1 - Query ARS Capabilities). 16 need to perform read-modify-write cycles to maintain ECC (Error 17 Correcting Code) blocks.
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/ |
H A D | Dimm.interface.yaml | 4 - name: MemoryDataWidth 8 - name: MemorySizeInKB 12 - name: MemoryDeviceLocator 16 - name: MemoryType 20 - name: MemoryTypeDetail 24 - name: MaxMemorySpeedInMhz 28 - name: MemoryAttributes 33 - name: MemoryConfiguredSpeedInMhz 37 - name: ECC 40 Error-Correcting Code. [all …]
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/openbmc/openbmc/poky/meta/recipes-bsp/lrzsz/ |
H A D | lrzsz_0.12.20.bb | 3 the public-domain version of Chuck Forsberg's rzsz package. \ 4 These programs use error correcting protocols ({z,x,y}modem) to send (sz, sx, sb) and \ 5 receive (rz, rx, rb) files over a dial-in serial port from a variety of programs \ 8 LICENSE = "GPL-2.0-or-later" 14 SRC_URI = "https://www.ohse.de/uwe/releases/lrzsz-${PV}.tar.gz \ 15 file://autotools-update.patch \ 18 file://lrzsz-check-locale.h.patch \ 19 file://cve-2018-10195.patch \ 21 file://0001-Fix-cross-compilation-using-autoconf-detected-AR.patch \ 32 install -d ${D}${bindir}/ [all …]
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/openbmc/linux/arch/alpha/include/asm/ |
H A D | mce.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 unsigned int err2 : 1; /* second error */ 14 unsigned int proc_offset; /* processor-specific offset */ 15 unsigned int sys_offset; /* system-specific offset */ 21 * --- This is used to log uncorrectable errors such as 23 * --- These errors are detected by both processor and systems. 26 unsigned long shadow[8]; /* Shadow reg. 8-14, 25 */ 34 unsigned long ic_perr_stat; /* I-CACHE Reg. <11> set Data parity 36 unsigned long dc_perr_stat; /* D-CACHE error Reg. Bits set to 1: 37 <2> Data error in bank 0 [all …]
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H A D | core_t2.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 14 * memory controller and PCI access for the SABLE-based systems. 27 /* GAMMA-SABLE is a SABLE with EV5-based CPUs */ 95 /* T2 CSRs are in the non-cachable primary IO space from 3.8000.0000 to 98 * +--------------+ 3 8000 0000 100 * +--------------+ 3 8100 0000 102 * +--------------+ 3 8200 0000 104 * +--------------+ 3 8300 0000 106 * +--------------+ 3 8400 0000 108 * +--------------+ 3 8700 0000 [all …]
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/openbmc/linux/drivers/mtd/nand/raw/ingenic/ |
H A D | jz4780_bch.c | 1 // SPDX-License-Identifier: GPL-2.0 68 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_reset() 71 reg = params->size << BCH_BHCNT_BLOCKSIZE_SHIFT; in jz4780_bch_reset() 72 reg |= params->bytes << BCH_BHCNT_PARITYSIZE_SHIFT; in jz4780_bch_reset() 73 writel(reg, bch->base + BCH_BHCNT); in jz4780_bch_reset() 77 reg |= params->strength << BCH_BHCR_BSEL_SHIFT; in jz4780_bch_reset() 80 writel(reg, bch->base + BCH_BHCR); in jz4780_bch_reset() 85 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_disable() 86 writel(BCH_BHCR_BCHE, bch->base + BCH_BHCCR); in jz4780_bch_disable() 98 while (size32--) in jz4780_bch_write_data() [all …]
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H A D | jz4725b_bch.c | 1 // SPDX-License-Identifier: GPL-2.0 64 writel(cfg, bch->base + BCH_BHCSR); in jz4725b_bch_config_set() 69 writel(cfg, bch->base + BCH_BHCCR); in jz4725b_bch_config_clear() 78 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4725b_bch_reset() 84 if (params->strength == 8) in jz4725b_bch_reset() 97 if (params->size > max_value) in jz4725b_bch_reset() 98 return -EINVAL; in jz4725b_bch_reset() 101 if (params->size + params->bytes > max_value) in jz4725b_bch_reset() 102 return -EINVAL; in jz4725b_bch_reset() 105 reg = params->size << BCH_BHCNT_ENC_COUNT_SHIFT; in jz4725b_bch_reset() [all …]
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/openbmc/linux/Documentation/ABI/testing/ |
H A D | sysfs-class-mtd | 4 Contact: linux-mtd@lists.infradead.org 12 Contact: linux-mtd@lists.infradead.org 22 Contact: linux-mtd@lists.infradead.org 24 These directories provide the corresponding read-only device 30 Contact: linux-mtd@lists.infradead.org 34 read-write device so <minor> will be even. 39 Contact: linux-mtd@lists.infradead.org 42 to the read-only variant of the MTD device (in 48 Contact: linux-mtd@lists.infradead.org 58 Contact: linux-mtd@lists.infradead.org [all …]
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/openbmc/linux/Documentation/driver-api/ |
H A D | edac.rst | 1 Error Detection And Correction (EDAC) Devices 5 ---------------------------------------- 8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*, 43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory 48 just one memory stick when an error occurs, as the error correction code 50 of correcting more errors than on single mode. 52 * Single-channel 55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using 57 memories. FB-DIMM and RAMBUS use a different concept for channel, so 60 * Double-channel [all …]
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/openbmc/linux/net/ipv4/ |
H A D | tcp_lp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TCP Low Priority (TCP-LP) 11 * the original TCP-LP implementation: 14 * o Error correcting in remote HZ, therefore remote HZ will be keeped 16 * o Handling calculation of One-Way-Delay (OWD) within rtt_sample, since 26 * http://www.ece.rice.edu/~akuzma/Doc/akuzma/TCP-LP.pdf 28 * http://www-ece.rice.edu/networks/TCP-LP/ 34 * http://tcp-lp-mod.sourceforge.net/ 50 * TCP-LP's state flags. 62 * @flag: TCP-LP state flag [all …]
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/openbmc/linux/scripts/dtc/libfdt/ |
H A D | fdt_sw.c | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 3 * libfdt - Flat Device Tree manipulation 17 return -FDT_ERR_BADSTATE; in fdt_sw_probe_() 19 return -FDT_ERR_BADMAGIC; in fdt_sw_probe_() 45 return -FDT_ERR_BADSTATE; in fdt_sw_probe_memrsv_() 72 return -FDT_ERR_BADSTATE; in fdt_sw_probe_struct_() 99 spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt) in fdt_grab_space_() 100 - fdt_size_dt_strings(fdt); in fdt_grab_space_() 116 return -FDT_ERR_NOSPACE; in fdt_create_with_flags() 119 return -FDT_ERR_BADFLAGS; in fdt_create_with_flags() [all …]
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/openbmc/openbmc/poky/bitbake/ |
H A D | ChangeLog | 2 - Add PE (Package Epoch) support from Philipp Zabel (pH5) 3 - Treat python functions the same as shell functions for logging 4 - Use TMPDIR/anonfunc as a __anonfunc temp directory (T) 5 - Catch truncated cache file errors 6 - Allow operations other than assignment on flag variables 7 - Add code to handle inter-task dependencies 8 - Fix cache errors when generation dotGraphs 9 - Make sure __inherit_cache is updated before calling include() (from Michael Krelin) 10 - Fix bug when target was in ASSUME_PROVIDED (#2236) 11 - Raise ParseError for filenames with multiple underscores instead of infinitely looping (#2062) [all …]
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/openbmc/linux/fs/xfs/ |
H A D | xfs_mount.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2000-2005 Silicon Graphics, Inc. 61 uuid_t *uuid = &mp->m_sb.sb_uuid; in xfs_uuid_mount() 65 uuid_copy(&mp->m_super->s_uuid, uuid); in xfs_uuid_mount() 71 xfs_warn(mp, "Filesystem has null UUID - can't mount"); in xfs_uuid_mount() 72 return -EINVAL; in xfs_uuid_mount() 76 for (i = 0, hole = -1; i < xfs_uuid_table_size; i++) { in xfs_uuid_mount() 98 xfs_warn(mp, "Filesystem has duplicate UUID %pU - can't mount", uuid); in xfs_uuid_mount() 99 return -EINVAL; in xfs_uuid_mount() 106 uuid_t *uuid = &mp->m_sb.sb_uuid; in xfs_uuid_unmount() [all …]
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/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | vf610_nfc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2009-2015 Freescale Semiconductor, Inc. and others 15 * - Untested on MPC5125 and M54418. 16 * - DMA and pipelining not used. 17 * - 2K pages or less. 18 * - HW ECC: Only 2K page with 64+ OOB. 19 * - HW ECC: Only 24 and 32-bit error correction implemented. 66 #define COMMAND_NADDR_BYTES(x) GENMASK(13, 13 - (x) + 1) 135 * ECC status - seems to consume 8 bytes (double word). The documented 140 #define ECC_SRAM_ADDR (PAGE_2K + OOB_MAX - 8) [all …]
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H A D | omap2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/dma-mapping.h> 18 #include <linux/mtd/nand-ecc-sw-bch.h> 21 #include <linux/omap-dma.h> 29 #include <linux/omap-gpmc.h> 30 #include <linux/platform_data/mtd-nand-omap2.h> 32 #define DRIVER_NAME "omap2-nand" 198 * omap_prefetch_enable - configures and starts prefetch transfer 212 return -1; in omap_prefetch_enable() 214 if (readl(info->reg.gpmc_prefetch_control)) in omap_prefetch_enable() [all …]
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H A D | s3c2410.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright © 2004-2008 Simtec Electronics 10 #define pr_fmt(fmt) "nand-s3c2410: " fmt 34 #include <linux/platform_data/mtd-nand-s3c2410.h> 77 return -ERANGE; in s3c2410_ooblayout_ecc() 79 oobregion->offset = 0; in s3c2410_ooblayout_ecc() 80 oobregion->length = 3; in s3c2410_ooblayout_ecc() 89 return -ERANGE; in s3c2410_ooblayout_free() 91 oobregion->offset = 8; in s3c2410_ooblayout_free() 92 oobregion->length = 8; in s3c2410_ooblayout_free() [all …]
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/openbmc/u-boot/drivers/net/ |
H A D | designware.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Designware ethernet IP driver for U-Boot 29 struct dw_eth_dev *priv = dev_get_priv((struct udevice *)bus->priv); in dw_mdio_read() 30 struct eth_mac_regs *mac_p = priv->mac_regs_p; in dw_mdio_read() 32 struct eth_mac_regs *mac_p = bus->priv; in dw_mdio_read() 41 writel(miiaddr | MII_CLKRANGE_150_250M | MII_BUSY, &mac_p->miiaddr); in dw_mdio_read() 45 if (!(readl(&mac_p->miiaddr) & MII_BUSY)) in dw_mdio_read() 46 return readl(&mac_p->miidata); in dw_mdio_read() 50 return -ETIMEDOUT; in dw_mdio_read() 57 struct dw_eth_dev *priv = dev_get_priv((struct udevice *)bus->priv); in dw_mdio_write() [all …]
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/openbmc/linux/Documentation/admin-guide/ |
H A D | ras.rst | 33 ------------- 36 hardware errors, and, when possible correcting them in runtime. It should 44 * Memory – add error correction logic (ECC) to detect and correct errors; 47 Self-Monitoring, Analysis and Reporting Technology (SMART). 49 By monitoring the number of occurrences of error detections, it is possible 55 --------------- 58 Codes that allow error correction when the number of errors on a bit packet 60 can indicate with a high degree of confidence that an error happened, but 63 Also, sometimes an error occur on a component that it is not used. For 68 * **Correctable Error (CE)** - the error detection mechanism detected and [all …]
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/openbmc/linux/Documentation/driver-api/mtd/ |
H A D | nand_ecc.rst | 2 NAND Error-correction Code 11 After that the speed was increased by 35-40%. 23 However NAND flash is not extremely reliable so some error detection 63 - cp0 is the parity that belongs to all bit0, bit2, bit4, bit6. 69 - cp2 is the parity over bit0, bit1, bit4 and bit5 70 - cp3 is the parity over bit2, bit3, bit6 and bit7. 71 - cp4 is the parity over bit0, bit1, bit2 and bit3. 72 - cp5 is the parity over bit4, bit5, bit6 and bit7. 78 - rp0 is the parity of all even bytes (0, 2, 4, 6, ... 252, 254) 79 - rp1 is the parity of all odd bytes (1, 3, 5, 7, ..., 253, 255) [all …]
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/openbmc/linux/drivers/md/ |
H A D | dm-verity-fec.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 #include "dm-verity-fec.h" 11 #define DM_MSG_PREFIX "verity-fec" 14 * If error correction has been configured, returns true. 18 return v->fec && v->fec->dev; in verity_fec_is_enabled() 28 ((char *)io + io->v->ti->per_io_data_size - sizeof(struct dm_verity_fec_io)); in fec_io() 38 mod = do_div(offset, v->fec->rsn); in fec_interleave() 39 return offset + mod * (v->fec->rounds << v->data_dev_block_bits); in fec_interleave() 43 * Decode an RS block using Reed-Solomon. 49 uint16_t par[DM_VERITY_FEC_RSM - DM_VERITY_FEC_MIN_RSN]; in fec_decode_rs8() [all …]
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/openbmc/linux/drivers/mtd/nand/ |
H A D | ecc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Generic Error-Correcting Code (ECC) engine 11 * designed to fit most cases, including parallel NANDs and SPI-NANDs. 15 * - external: The ECC engine is outside the NAND pipeline, typically this 18 * - pipelined: The ECC engine is inside the NAND pipeline, ie. on the 23 * - ondie: The ECC engine is inside the NAND pipeline, on the chip's side. 28 * - prepare: Prepare an I/O request. Enable/disable the ECC engine based on 32 * - finish: Finish an I/O request. Correct the data in case of a read 40 * - raw: Correction disabled 41 * - ecc: Correction enabled [all …]
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/openbmc/u-boot/drivers/mtd/nand/raw/ |
H A D | davinci_nand.c | 1 // SPDX-License-Identifier: GPL-2.0+ 18 * ---------------------------------------------------------------------------- 20 * ---------------------------------------------------------------------------- 28 - 34 #include <asm/ti-common/davinci_nand.h> 36 /* Definitions for 4-bit hardware ECC */ 47 * Exploit the little endianness of the ARM to do multi-byte transfers 57 const u32 *nand = chip->IO_ADDR_R; in nand_davinci_read_buf() 65 len--; in nand_davinci_read_buf() 73 len -= 2; in nand_davinci_read_buf() [all …]
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H A D | omap_gpmc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com> 54 * omap_nand_hwcontrol - Set the address pointers corretly for the 62 int cs = info->cs; in omap_nand_hwcontrol() 70 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd; in omap_nand_hwcontrol() 73 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_adr; in omap_nand_hwcontrol() 76 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat; in omap_nand_hwcontrol() 81 writeb(cmd, this->IO_ADDR_W); in omap_nand_hwcontrol() 89 return gpmc_cfg->status & (1 << (8 + info->ws)); in omap_dev_ready() 93 * gen_true_ecc - This function will generate true ECC value, which [all …]
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/openbmc/qemu/block/ |
H A D | quorum.c | 4 * Copyright (C) 2012-2014 Nodalink, EURL. 13 * See the COPYING file in the top-level directory. 24 #include "qapi/error.h" 25 #include "qapi/qapi-events-block.h" 36 #define QUORUM_OPT_VOTE_THRESHOLD "vote-threshold" 38 #define QUORUM_OPT_REWRITE "rewrite-corrupted" 39 #define QUORUM_OPT_READ_PATTERN "read-pattern" 43 uint8_t h[HASH_LENGTH]; /* SHA-256 hash */ 80 * same result a quorum error occurs. 90 bool rewrite_corrupted;/* true if the driver must rewrite-on-read corrupted [all …]
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/openbmc/linux/drivers/char/agp/ |
H A D | amd64-agp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright 2001-2003 SuSE Labs. 6 * This is a GART driver for the AMD Opteron/Athlon64 on-CPU northbridge. 50 struct agp_bridge_data *bridge = mem->bridge; in amd64_insert_memory() 55 if (type != mem->type) in amd64_insert_memory() 56 return -EINVAL; in amd64_insert_memory() 57 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type); in amd64_insert_memory() 59 return -EINVAL; in amd64_insert_memory() 64 if (((unsigned long)pg_start + mem->page_count) > num_entries) in amd64_insert_memory() 65 return -EINVAL; in amd64_insert_memory() [all …]
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