1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2ec221208SDavid Howells #ifndef __ALPHA_MCE_H 3ec221208SDavid Howells #define __ALPHA_MCE_H 4ec221208SDavid Howells 5ec221208SDavid Howells /* 6ec221208SDavid Howells * This is the logout header that should be common to all platforms 7ec221208SDavid Howells * (assuming they are running OSF/1 PALcode, I guess). 8ec221208SDavid Howells */ 9ec221208SDavid Howells struct el_common { 10ec221208SDavid Howells unsigned int size; /* size in bytes of logout area */ 11ec221208SDavid Howells unsigned int sbz1 : 30; /* should be zero */ 12ec221208SDavid Howells unsigned int err2 : 1; /* second error */ 13ec221208SDavid Howells unsigned int retry : 1; /* retry flag */ 14ec221208SDavid Howells unsigned int proc_offset; /* processor-specific offset */ 15ec221208SDavid Howells unsigned int sys_offset; /* system-specific offset */ 16ec221208SDavid Howells unsigned int code; /* machine check code */ 17ec221208SDavid Howells unsigned int frame_rev; /* frame revision */ 18ec221208SDavid Howells }; 19ec221208SDavid Howells 20ec221208SDavid Howells /* Machine Check Frame for uncorrectable errors (Large format) 21ec221208SDavid Howells * --- This is used to log uncorrectable errors such as 22ec221208SDavid Howells * double bit ECC errors. 23ec221208SDavid Howells * --- These errors are detected by both processor and systems. 24ec221208SDavid Howells */ 25ec221208SDavid Howells struct el_common_EV5_uncorrectable_mcheck { 26ec221208SDavid Howells unsigned long shadow[8]; /* Shadow reg. 8-14, 25 */ 27ec221208SDavid Howells unsigned long paltemp[24]; /* PAL TEMP REGS. */ 28ec221208SDavid Howells unsigned long exc_addr; /* Address of excepting instruction*/ 29ec221208SDavid Howells unsigned long exc_sum; /* Summary of arithmetic traps. */ 30ec221208SDavid Howells unsigned long exc_mask; /* Exception mask (from exc_sum). */ 31ec221208SDavid Howells unsigned long pal_base; /* Base address for PALcode. */ 32ec221208SDavid Howells unsigned long isr; /* Interrupt Status Reg. */ 33ec221208SDavid Howells unsigned long icsr; /* CURRENT SETUP OF EV5 IBOX */ 34ec221208SDavid Howells unsigned long ic_perr_stat; /* I-CACHE Reg. <11> set Data parity 35ec221208SDavid Howells <12> set TAG parity*/ 36ec221208SDavid Howells unsigned long dc_perr_stat; /* D-CACHE error Reg. Bits set to 1: 37ec221208SDavid Howells <2> Data error in bank 0 38ec221208SDavid Howells <3> Data error in bank 1 39ec221208SDavid Howells <4> Tag error in bank 0 40ec221208SDavid Howells <5> Tag error in bank 1 */ 41ec221208SDavid Howells unsigned long va; /* Effective VA of fault or miss. */ 42ec221208SDavid Howells unsigned long mm_stat; /* Holds the reason for D-stream 43ec221208SDavid Howells fault or D-cache parity errors */ 44ec221208SDavid Howells unsigned long sc_addr; /* Address that was being accessed 45ec221208SDavid Howells when EV5 detected Secondary cache 46ec221208SDavid Howells failure. */ 47ec221208SDavid Howells unsigned long sc_stat; /* Helps determine if the error was 48ec221208SDavid Howells TAG/Data parity(Secondary Cache)*/ 49ec221208SDavid Howells unsigned long bc_tag_addr; /* Contents of EV5 BC_TAG_ADDR */ 50ec221208SDavid Howells unsigned long ei_addr; /* Physical address of any transfer 51ec221208SDavid Howells that is logged in EV5 EI_STAT */ 52ec221208SDavid Howells unsigned long fill_syndrome; /* For correcting ECC errors. */ 53ec221208SDavid Howells unsigned long ei_stat; /* Helps identify reason of any 54ec221208SDavid Howells processor uncorrectable error 55ec221208SDavid Howells at its external interface. */ 56ec221208SDavid Howells unsigned long ld_lock; /* Contents of EV5 LD_LOCK register*/ 57ec221208SDavid Howells }; 58ec221208SDavid Howells 59ec221208SDavid Howells struct el_common_EV6_mcheck { 60ec221208SDavid Howells unsigned int FrameSize; /* Bytes, including this field */ 61ec221208SDavid Howells unsigned int FrameFlags; /* <31> = Retry, <30> = Second Error */ 62ec221208SDavid Howells unsigned int CpuOffset; /* Offset to CPU-specific info */ 63ec221208SDavid Howells unsigned int SystemOffset; /* Offset to system-specific info */ 64ec221208SDavid Howells unsigned int MCHK_Code; 65ec221208SDavid Howells unsigned int MCHK_Frame_Rev; 66ec221208SDavid Howells unsigned long I_STAT; /* EV6 Internal Processor Registers */ 67ec221208SDavid Howells unsigned long DC_STAT; /* (See the 21264 Spec) */ 68ec221208SDavid Howells unsigned long C_ADDR; 69ec221208SDavid Howells unsigned long DC1_SYNDROME; 70ec221208SDavid Howells unsigned long DC0_SYNDROME; 71ec221208SDavid Howells unsigned long C_STAT; 72ec221208SDavid Howells unsigned long C_STS; 73ec221208SDavid Howells unsigned long MM_STAT; 74ec221208SDavid Howells unsigned long EXC_ADDR; 75ec221208SDavid Howells unsigned long IER_CM; 76ec221208SDavid Howells unsigned long ISUM; 77ec221208SDavid Howells unsigned long RESERVED0; 78ec221208SDavid Howells unsigned long PAL_BASE; 79ec221208SDavid Howells unsigned long I_CTL; 80ec221208SDavid Howells unsigned long PCTX; 81ec221208SDavid Howells }; 82ec221208SDavid Howells 83ec221208SDavid Howells 84ec221208SDavid Howells #endif /* __ALPHA_MCE_H */ 85