/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | mmc-pwrseq-simple.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 19 const: mmc-pwrseq-simple 21 reset-gpios: 28 They will be de-asserted right after the power has been provided to the 33 description: Handle for the entry in clock-names. 35 clock-names: [all …]
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Logging/ |
H A D | IPMI.interface.yaml | 6 type followed by type-specific information. The type-specific information 8 adding the SEL record), sensor number, event direction and event-specific 12 events it requires a generator ID (0x20 for BMC), sensor D-Bus path, event 13 direction (assertion or de-assertion), and event specific data. For OEM type 19 - name: IpmiSelAdd 23 - name: Message 27 - name: Path 31 - name: SELData 35 - name: Assert 38 An indicator if the SEL event is asserting or de-asserting. [all …]
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/openbmc/u-boot/doc/device-tree-bindings/spi/ |
H A D | spi-cadence.txt | 2 -------------------------------------------- 5 - compatible : should be "cdns,qspi-nor" 6 - reg : 1.Physical base address and size of SPI registers map. 8 - clocks : Clock phandles (see clock bindings for details). 9 - cdns,fifo-depth : Size of the data FIFO in words. 10 - cdns,fifo-width : Bus width of the data FIFO in bytes. 11 - cdns,trigger-address : 32-bit indirect AHB trigger address. 12 - cdns,is-decoded-cs : Flag to indicate whether decoder is used or not. 13 - status : enable in requried dts. 16 -------------------------- [all …]
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/openbmc/linux/drivers/hwmon/ |
H A D | sfctemp.c | 1 // SPDX-License-Identifier: GPL-2.0 19 * TempSensor reset. The RSTN can be de-asserted once the analog core has 21 * 0:reset 1:de-assert 27 * Tpu(min 50us) after PD is de-asserted. RSTN should be held low until the 41 * Temp(C)=DOUT*Y/4094 - K 65 writel(SFCTEMP_PD, sfctemp->regs); in sfctemp_power_up() 68 writel(0, sfctemp->regs); in sfctemp_power_up() 72 /* de-assert reset */ in sfctemp_power_up() 73 writel(SFCTEMP_RSTN, sfctemp->regs); in sfctemp_power_up() 79 writel(SFCTEMP_PD, sfctemp->regs); in sfctemp_power_down() [all …]
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/openbmc/linux/include/linux/platform_data/ |
H A D | ad5449.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 7 * Author: Lars-Peter Clausen <lars@metafoo.de> 14 * enum ad5449_sdo_mode - AD5449 SDO pin configuration 17 * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode. 29 * struct ad5449_platform_data - Platform data for the ad5449 DAC driver 31 * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the
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/openbmc/linux/Documentation/devicetree/bindings/net/bluetooth/ |
H A D | nxp,88w8987-bt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/bluetooth/nxp,88w8987-bt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 This binding describes UART-attached NXP bluetooth chips. These chips 11 are dual-radio chips supporting WiFi and Bluetooth. The bluetooth 12 works on standard H4 protocol over 4-wire UART. The RTS and CTS lines 14 asserts break signal over UART-TX line to put the chip into power save 15 state. De-asserting break wakes up the BT chip. 18 - Neeraj Sanjay Kale <neeraj.sanjaykale@nxp.com> [all …]
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/openbmc/u-boot/arch/arm/mach-zynq/ |
H A D | slcr.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (c) 2013 - 2017 Xilinx Inc. 24 * zynq_slcr_mio_get_status - Get the status of MIO peripheral. 92 writel(SLCR_LOCK_MAGIC, &slcr_base->slcr_lock); in zynq_slcr_lock() 100 writel(SLCR_UNLOCK_MAGIC, &slcr_base->slcr_unlock); in zynq_slcr_unlock() 117 * the FSBL not loading the bitstream after soft-reboot in zynq_slcr_cpu_reset() 120 clrbits_le32(&slcr_base->reboot_status, 0xF000000); in zynq_slcr_cpu_reset() 122 writel(1, &slcr_base->pss_rst_ctrl); in zynq_slcr_cpu_reset() 131 /* Disable AXI interface by asserting FPGA resets */ in zynq_slcr_devcfg_disable() 132 writel(0xF, &slcr_base->fpga_rst_ctrl); in zynq_slcr_devcfg_disable() [all …]
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/openbmc/linux/drivers/clk/qcom/ |
H A D | clk-pll.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/clk-provider.h> 17 #include "clk-pll.h" 31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable() 40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable() 47 * de-asserting the reset. Delay 10us just to be safe. in clk_pll_enable() 51 /* De-assert active-low PLL reset. */ in clk_pll_enable() 52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable() 61 return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL, in clk_pll_enable() 71 regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_disable() [all …]
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H A D | clk-hfpll.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <linux/clk-provider.h> 12 #include "clk-regmap.h" 13 #include "clk-hfpll.h" 23 struct hfpll_data const *hd = h->d; in __clk_hfpll_init_once() 24 struct regmap *regmap = h->clkr.regmap; in __clk_hfpll_init_once() 26 if (likely(h->init_done)) in __clk_hfpll_init_once() 30 if (hd->config_val) in __clk_hfpll_init_once() 31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once() 32 regmap_write(regmap, hd->m_reg, 0); in __clk_hfpll_init_once() [all …]
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/openbmc/linux/drivers/gpu/drm/msm/hdmi/ |
H A D | hdmi_pll_8960.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/clk-provider.h> 27 * configuration into common-clock-framework. 239 msm_writel(data, pll->mmio + reg); in pll_write() 244 return msm_readl(pll->mmio + reg); in pll_read() 249 return platform_get_drvdata(pll->pdev); in pll_get_phy() 266 /* Wait for a short time before de-asserting in hdmi_pll_enable() 269 * to assert and de-assert. in hdmi_pll_enable() 273 /* De-assert PLL S/W reset */ in hdmi_pll_enable() 282 * Wait for a short time before de-asserting to allow the hardware to in hdmi_pll_enable() [all …]
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/openbmc/phosphor-led-manager/manager/ |
H A D | manager.cpp | 5 #include <phosphor-logging/lg2.hpp> 44 -> std::map<LedName, Layout::LedAction> in getNewMapWithGroupPriorities() 52 for (const Layout::LedAction& action : it->actionSet) in getNewMapWithGroupPriorities() 68 for (const Layout::LedAction& action : it->actionSet) in getNewMapWithLEDPriorities() 90 if (it->priority != 0) in getNewMap() 108 // Assert -or- De-assert 238 return -1; in drivePhysicalLED() 249 // TODO: openbmc/phosphor-led-manager#5 in getPhysicalAction() 275 lg2::debug("De-Asserting LED, NAME = {NAME}, ACTION = {ACTION}", "NAME", in driveLedsHandler() 287 lg2::debug("Asserting LED, NAME = {NAME}, ACTION = {ACTION}", "NAME", in driveLedsHandler()
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/openbmc/openbmc/meta-ampere/meta-jade/recipes-ampere/platform/ampere-utils/ |
H A D | ampere_firmware_upgrade.sh | 5 FRU_DEVICE="/sys/bus/i2c/devices/3-0050/eeprom" 7 if ! command -v ampere_fru_upgrade; 12 ampere_fru_upgrade -d $FRU_DEVICE -f "$IMAGE" 21 if ! command -v ampere_eeprom_prog; 28 chassisstate=$(obmcutil chassisstate | awk -F. '{print $NF}') 37 while [ "$cnt" -gt 0 ]; 39 cnt=$((cnt - 1)) 42 chassisstate_off=$(obmcutil chassisstate | awk -F. '{print $NF}') 50 echo "--- Error : Failed turning the Chassis off" 57 gpioset $(gpiofind host0-special-boot)=1 [all …]
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/openbmc/linux/drivers/reset/ |
H A D | reset-brcmstb.c | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <linux/reset-controller.h> 46 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET); in brcmstb_reset_assert() 57 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR); in brcmstb_reset_deassert() 58 /* Maximum reset delay after de-asserting a line and seeing block in brcmstb_reset_deassert() 73 return readl_relaxed(priv->base + off + SW_INIT_STATUS) & in brcmstb_reset_status() 85 struct device *kdev = &pdev->dev; in brcmstb_reset_probe() 91 return -ENOMEM; in brcmstb_reset_probe() 94 priv->base = devm_ioremap_resource(kdev, res); in brcmstb_reset_probe() 95 if (IS_ERR(priv->base)) in brcmstb_reset_probe() [all …]
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/openbmc/linux/arch/arm/mach-omap2/ |
H A D | prminst44xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 18 #include "prcm-common.h" 23 #include "prm-regbits-44xx.h" 34 * omap_prm_base_init - Populates the prm partitions 75 /* Read-modify-write a register in PRM. Caller must lock */ 90 * omap4_prminst_is_hardreset_asserted - read the HW reset line state of 97 * -EINVAL upon parameter error. 112 * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule 118 * IP. These modules may have multiple hard-reset lines that reset 120 * place the submodule into reset. Returns 0 upon success or -EINVAL [all …]
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H A D | prm2xxx_3xxx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2010-2011 Texas Instruments, Inc. 18 #include "prm-regbits-24xx.h" 22 * omap2_prm_is_hardreset_asserted - read the HW reset line state of 31 * -EINVAL if called while running on a non-OMAP2/3 chip. 40 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule 48 * IP. These modules may have multiple hard-reset lines that reset 50 * place the submodule into reset. Returns 0 upon success or -EINVAL 64 * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait 75 * IP. These modules may have multiple hard-reset lines that reset [all …]
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H A D | prm33xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ 16 #include "prm-regbits-33xx.h" 34 /* Read-modify-write a register in PRM. Caller must lock */ 48 * am33xx_prm_is_hardreset_asserted - read the HW reset line state of 57 * -EINVAL upon parameter error. 72 * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule 80 * IP. These modules may have multiple hard-reset lines that reset 82 * place the submodule into reset. Returns 0 upon success or -EINVAL 96 * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and [all …]
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/openbmc/linux/drivers/remoteproc/ |
H A D | qcom_q6v5_adsp.c | 1 // SPDX-License-Identifier: GPL-2.0 126 struct device **devs = adsp->proxy_pds; in qcom_rproc_pds_attach() 135 if (dev->pm_domain) { in qcom_rproc_pds_attach() 144 if (num_pds > ARRAY_SIZE(adsp->proxy_pds)) in qcom_rproc_pds_attach() 145 return -E2BIG; in qcom_rproc_pds_attach() 150 ret = PTR_ERR(devs[i]) ? : -ENODATA; in qcom_rproc_pds_attach() 158 for (i--; i >= 0; i--) in qcom_rproc_pds_attach() 167 struct device *dev = adsp->dev; in qcom_rproc_pds_detach() 171 if (dev->pm_domain && pd_count) { in qcom_rproc_pds_detach() 198 for (i--; i >= 0; i--) { in qcom_rproc_pds_enable() [all …]
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/openbmc/linux/drivers/cpufreq/ |
H A D | gx-suspmod.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * (C) 2002 Hiroshi Miura <miura@da-cha.org> 10 * software is provided AS-IS with no warranties. 19 * Suspend Modulation works by asserting and de-asserting the SUSP# pin 20 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP# 28 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF) 35 * F_eff = Fgx * ---------------------- 43 * on_duration = off_duration * (stock_freq - freq) / freq 46 * on_duration = DURATION - off_duration 48 *--------------------------------------------------------------------------- [all …]
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/openbmc/openbmc/meta-ibm/meta-system1/recipes-phosphor/flash/phosphor-software-manager/ |
H A D | bios-update.sh | 3 set -e 8 # Find the GPIO pin associated with "pch-ready" 10 PCH_READY_GPIO_PIN=$(gpiofind "pch-ready") 12 if [ -z "${PCH_READY_GPIO_PIN}" ]; then 13 echo "gpio 'pch-ready' not found in device tree. Exiting." 17 read -r PCH_READY_GPIO_CHIP PCH_READY_GPIO_LINE <<< "$PCH_READY_GPIO_PIN" 25 IMAGE_FILE=$(find "$1" -name "*.rom") 31 # me address, 0x2e oen, 0x00 - lun, 0xdf - force recovery 33 # me address, 0x6 App Fn, 0x00 - lun, 0x2 - cold reset 35 # me address, 0x6 App Fn, 0x00 - lun, 0x1 - get device id [all …]
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/openbmc/u-boot/drivers/pci/ |
H A D | pcie_imx.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Freescale i.MX6 PCI Express Root-Complex driver 5 * Copyright (C) 2013 Marek Vasut <marex@denx.de> 8 * pci-imx6.c: Sean Cross <xobs@kosagi.com> 9 * pcie-designware.c: Jingoo Han <jg1.han@samsung.com> 42 /* PCIe Port Logic registers (memory-mapped) */ 63 /* PHY registers (not memory-mapped) */ 115 return -ETIMEDOUT; in pcie_phy_poll_ack() 143 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */ 200 /* wait for ack de-assertion */ in pcie_phy_write() [all …]
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/openbmc/linux/drivers/clk/ |
H A D | clk-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com 7 * Sergej Sawazki <ce3a@gmx.de> 12 #include <linux/clk-provider.h> 25 * prepare - clk_(un)prepare only ensures parent is (un)prepared 26 * enable - clk_enable and clk_disable are functional & control gpio 27 * rate - inherits rate from parent. No clk_set_rate support 28 * parent - fixed parent. No clk_set_parent support 32 * struct clk_gpio - gpio gated clock 34 * @hw: handle between common and hardware-specific interfaces [all …]
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/openbmc/linux/arch/arm/mach-sunxi/ |
H A D | mc_smp.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2018 Chen-Yu Tsai 5 * Chen-Yu Tsai <wens@csie.org> 7 * arch/arm/mach-sunxi/mc_smp.c 9 * Based on Allwinner code, arch/arm/mach-exynos/mcpm-exynos.c, and 10 * arch/arm/mach-hisi/platmcpm.c 14 #include <linux/arm-cci.h> 19 #include <linux/irqchip/arm-gic.h> 70 /* R_CPUCFG registers, specific to sun8i-a83t */ 110 is_compatible = of_device_is_compatible(node, "arm,cortex-a15"); in sunxi_core_is_cortex_a15() [all …]
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/openbmc/openbmc/poky/meta/files/common-licenses/ |
H A D | CDLA-Permissive-1.0 | 21 1.7 “Modify” means to delete, erase, correct or re-arrange Data, resulting in “Modifications.” Mod… 27 …rom Your Computational Use of Data. Results shall not include more than a de minimis portion of t… 37 … of this Agreement, Data Provider(s) hereby grant(s) to You a worldwide, non-exclusive, irrevocabl… 67 …e who Receives the Data (including a cross-claim in a lawsuit) based on the Data, other than a cla… 71 …ED INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, MERCHAN…
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/openbmc/linux/drivers/i2c/ |
H A D | i2c-smbus.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * i2c-smbus.c - SMBus extensions to the I2C protocol 6 * Copyright (C) 2010-2019 Jean Delvare <jdelvare@suse.de> 12 #include <linux/i2c-smbus.h> 39 if (!client || client->addr != data->addr) in smbus_do_alert() 41 if (client->flags & I2C_CLIENT_TEN) in smbus_do_alert() 49 if (client->dev.driver) { in smbus_do_alert() 50 driver = to_i2c_driver(client->dev.driver); in smbus_do_alert() 51 if (driver->alert) { in smbus_do_alert() 53 driver->alert(client, data->type, data->data); in smbus_do_alert() [all …]
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/openbmc/linux/drivers/clk/tegra/ |
H A D | clk.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/clk-provider.h> 16 #include <linux/reset-controller.h> 35 /* Handlers for SoC-specific reset lines */ 121 return -EINVAL; in tegra_clk_rst_assert() 135 return -EINVAL; in tegra_clk_rst_deassert() 200 * All non-boot peripherals will be in reset state on resume. in tegra_clk_periph_resume() 201 * Wait for 5us of reset propagation delay before de-asserting in tegra_clk_periph_resume() 218 return -ENOMEM; in tegra_clk_periph_ctx_init() 262 for (; dup_list->clk_id < clk_max; dup_list++) { in tegra_init_dup_clks() [all …]
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