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Searched full:disp_cc_mdss_pclk1_clk_src (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,dispcc-sdm845.h28 #define DISP_CC_MDSS_PCLK1_CLK_SRC 18 macro
H A Dqcom,dispcc-sm8150.h49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
H A Dqcom,dispcc-sm8250.h49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
H A Dqcom,dispcc-sm8350.h49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
H A Dqcom,sm8450-dispcc.h78 #define DISP_CC_MDSS_PCLK1_CLK_SRC 68 macro
H A Dqcom,dispcc-sc8280xp.h78 #define DISP_CC_MDSS_PCLK1_CLK_SRC 68 macro
H A Dqcom,sm8550-dispcc.h79 #define DISP_CC_MDSS_PCLK1_CLK_SRC 69 macro
/openbmc/linux/drivers/clk/qcom/
H A Ddispcc-sdm845.c289 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
295 .name = "disp_cc_mdss_pclk1_clk_src",
684 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
807 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
H A Ddispcc-sm8250.c586 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
592 .name = "disp_cc_mdss_pclk1_clk_src",
1067 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
1210 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
1317 &disp_cc_mdss_pclk1_clk_src, in disp_cc_sm8250_probe()
H A Ddispcc-sm8550.c627 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
634 .name = "disp_cc_mdss_pclk1_clk_src",
1509 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
1698 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
H A Ddispcc-sm8450.c591 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
598 .name = "disp_cc_mdss_pclk1_clk_src",
1478 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
1702 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
H A Ddispcc-sc8280xp.c2947 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp0_cc_mdss_pclk1_clk_src.clkr,
3029 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp1_cc_mdss_pclk1_clk_src.clkr,
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sdm845-mdss.yaml231 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dqcom,sm8550-mdss.yaml293 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dqcom,sm8250-mdss.yaml285 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dqcom,sm8150-mdss.yaml283 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dqcom,sm8450-mdss.yaml304 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm8350.dtsi2733 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dsm8150.dtsi3888 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dsm8550.dtsi2740 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dsm8450.dtsi3031 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dsdm845.dtsi4695 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
H A Dsm8250.dtsi4505 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;