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/openbmc/qemu/target/openrisc/
H A Dtranslate.c62 static inline bool is_user(DisasContext *dc) in is_user() argument
67 return !(dc->tb_flags & TB_FLAGS_SM); in is_user()
135 static void gen_exception(DisasContext *dc, unsigned int excp) in gen_exception() argument
140 static void gen_illegal_exception(DisasContext *dc) in gen_illegal_exception() argument
142 tcg_gen_movi_tl(cpu_pc, dc->base.pc_next); in gen_illegal_exception()
143 gen_exception(dc, EXCP_ILLEGAL); in gen_illegal_exception()
144 dc->base.is_jmp = DISAS_NORETURN; in gen_illegal_exception()
147 static bool check_v1_3(DisasContext *dc) in check_v1_3() argument
149 return dc->avr >= 0x01030000; in check_v1_3()
152 static bool check_of32s(DisasContext *dc) in check_of32s() argument
[all …]
/openbmc/qemu/target/microblaze/
H A Dtranslate.c79 static int typeb_imm(DisasContext *dc, int x) in typeb_imm() argument
81 if (dc->tb_flags & IMM_FLAG) { in typeb_imm()
82 return deposit32(dc->ext_imm, 0, 16, x); in typeb_imm()
90 static void t_sync_flags(DisasContext *dc) in t_sync_flags() argument
93 if ((dc->tb_flags ^ dc->base.tb->flags) & IFLAGS_TB_MASK) { in t_sync_flags()
94 tcg_gen_movi_i32(cpu_iflags, dc->tb_flags & IFLAGS_TB_MASK); in t_sync_flags()
98 static void gen_raise_exception(DisasContext *dc, uint32_t index) in gen_raise_exception() argument
101 dc->base.is_jmp = DISAS_NORETURN; in gen_raise_exception()
104 static void gen_raise_exception_sync(DisasContext *dc, uint32_t index) in gen_raise_exception_sync() argument
106 t_sync_flags(dc); in gen_raise_exception_sync()
[all …]
/openbmc/qemu/target/sparc/
H A Dtranslate.c212 static void gen_update_fprs_dirty(DisasContext *dc, int rd) in gen_update_fprs_dirty() argument
218 if (!(dc->fprs_dirty & bit)) { in gen_update_fprs_dirty()
219 dc->fprs_dirty |= bit; in gen_update_fprs_dirty()
241 static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src) in gen_load_fpr_F() argument
248 static void gen_store_fpr_F(DisasContext *dc, unsigned int dst, TCGv_i32 v) in gen_store_fpr_F() argument
251 gen_update_fprs_dirty(dc, dst); in gen_store_fpr_F()
261 static TCGv_i64 gen_load_fpr_D(DisasContext *dc, unsigned int src) in gen_load_fpr_D() argument
268 static void gen_store_fpr_D(DisasContext *dc, unsigned int dst, TCGv_i64 v) in gen_store_fpr_D() argument
271 gen_update_fprs_dirty(dc, dst); in gen_store_fpr_D()
274 static TCGv_i128 gen_load_fpr_Q(DisasContext *dc, unsigned int src) in gen_load_fpr_Q() argument
[all …]
/openbmc/qemu/scripts/coccinelle/
H A Ddevice-reset.cocci13 // * all cpu_class_set_parent_reset() callsites have a 'DeviceClass *dc' local
18 identifier dc, resetfn;
20 DeviceClass *dc;
22 - dc->reset = resetfn;
23 + device_class_set_legacy_reset(dc, resetfn);
25 identifier dc, resetfn;
27 DeviceClass *dc;
29 - dc->reset = &resetfn;
30 + device_class_set_legacy_reset(dc, resetfn);
/openbmc/qemu/target/xtensa/
H A Dtranslate.c278 static inline bool option_enabled(DisasContext *dc, int opt) in option_enabled() argument
280 return xtensa_option_enabled(dc->config, opt); in option_enabled()
283 static void init_sar_tracker(DisasContext *dc) in init_sar_tracker() argument
285 dc->sar_5bit = false; in init_sar_tracker()
286 dc->sar_m32_5bit = false; in init_sar_tracker()
287 dc->sar_m32 = NULL; in init_sar_tracker()
290 static void gen_right_shift_sar(DisasContext *dc, TCGv_i32 sa) in gen_right_shift_sar() argument
293 if (dc->sar_m32_5bit) { in gen_right_shift_sar()
294 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
296 dc->sar_5bit = true; in gen_right_shift_sar()
[all …]
/openbmc/qemu/ui/
H A Ddbus-chardev.c115 DBusChardev *dc, in dbus_chr_register() argument
142 if (qemu_chr_add_client(CHARDEV(dc), fd) < 0) { in dbus_chr_register()
155 g_object_set(dc->iface, in dbus_chr_register()
169 DBusChardev *dc, in dbus_chr_send_break() argument
173 qemu_chr_be_event(CHARDEV(dc), CHR_EVENT_BREAK); in dbus_chr_send_break()
185 DBusChardev *dc = DBUS_CHARDEV(chr); in dbus_chr_open() local
188 .chardev = dc, in dbus_chr_open()
193 dc->iface = qemu_dbus_display1_chardev_skeleton_new(); in dbus_chr_open()
194 g_object_set(dc->iface, "name", backend->u.dbus.data->name, NULL); in dbus_chr_open()
195 g_object_connect(dc->iface, in dbus_chr_open()
[all …]
/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dspl_power_init.c115 * mxs_power_set_linreg() - Set linear regulators 25mV below DC-DC converter
118 * to be 25mV below the VDDIO, VDDA and VDDD output from the DC-DC switching
120 * linear regulators and DC-DC converter to power the VDDIO rail.
128 debug("SPL: Setting VDDD 25mV below DC-DC converters\n"); in mxs_power_set_linreg()
133 debug("SPL: Setting VDDA 25mV below DC-DC converters\n"); in mxs_power_set_linreg()
138 debug("SPL: Setting VDDIO 25mV below DC-DC converters\n"); in mxs_power_set_linreg()
178 * the DC-DC converter.
233 * to cause undervolt on the 4P2 linear regulator supplying the DC-DC
250 * mxs_power_switch_dcdc_clocksource() - Switch PLL clock for DC-DC converters
254 * for the DC-DC converters.
[all …]
/openbmc/qemu/hw/usb/
H A Dhcd-ehci-sysbus.c85 DeviceClass *dc = DEVICE_CLASS(klass); in ehci_sysbus_class_init() local
91 dc->realize = usb_ehci_sysbus_realize; in ehci_sysbus_class_init()
92 dc->vmsd = &vmstate_ehci_sysbus; in ehci_sysbus_class_init()
93 device_class_set_props(dc, ehci_sysbus_properties); in ehci_sysbus_class_init()
94 device_class_set_legacy_reset(dc, usb_ehci_sysbus_reset); in ehci_sysbus_class_init()
95 set_bit(DEVICE_CATEGORY_USB, dc->categories); in ehci_sysbus_class_init()
101 DeviceClass *dc = DEVICE_CLASS(oc); in ehci_platform_class_init() local
105 set_bit(DEVICE_CATEGORY_USB, dc->categories); in ehci_platform_class_init()
111 DeviceClass *dc = DEVICE_CLASS(oc); in ehci_exynos4210_class_init() local
115 set_bit(DEVICE_CATEGORY_USB, dc->categories); in ehci_exynos4210_class_init()
[all …]
H A Dhcd-uhci-sysbus.c
/openbmc/u-boot/drivers/video/
H A Dtegra.c44 static void update_window(struct dc_ctlr *dc, struct disp_ctl_win *win) in update_window() argument
49 val = readl(&dc->cmd.disp_win_header); in update_window()
51 writel(val, &dc->cmd.disp_win_header); in update_window()
53 writel(win->fmt, &dc->win.color_depth); in update_window()
55 clrsetbits_le32(&dc->win.byte_swap, BYTE_SWAP_MASK, in update_window()
60 writel(val, &dc->win.pos); in update_window()
64 writel(val, &dc->win.size); in update_window()
68 writel(val, &dc->win.prescaled_size); in update_window()
70 writel(0, &dc->win.h_initial_dda); in update_window()
71 writel(0, &dc->win.v_initial_dda); in update_window()
[all …]
/openbmc/qemu/hw/uefi/
H A Dvar-service-sysbus.c69 DeviceClass *dc = DEVICE_CLASS(klass); in uefi_vars_sysbus_class_init() local
71 dc->realize = uefi_vars_sysbus_realize; in uefi_vars_sysbus_class_init()
72 dc->vmsd = &vmstate_uefi_vars_sysbus; in uefi_vars_sysbus_class_init()
73 dc->user_creatable = true; in uefi_vars_sysbus_class_init()
74 device_class_set_legacy_reset(dc, uefi_vars_sysbus_reset); in uefi_vars_sysbus_class_init()
75 device_class_set_props(dc, uefi_vars_sysbus_properties); in uefi_vars_sysbus_class_init()
76 set_bit(DEVICE_CATEGORY_MISC, dc->categories); in uefi_vars_sysbus_class_init()
105 DeviceClass *dc = DEVICE_CLASS(klass); in uefi_vars_x64_class_init() local
107 dc->realize = uefi_vars_x64_realize; in uefi_vars_x64_class_init()
/openbmc/openbmc/meta-facebook/meta-yosemite4/recipes-phosphor/state/phosphor-state-manager/
H A Dhost-powercycle25 msg="Execute host$CHASSIS_ID DC power cycle"
31 msg="Wait power control flock release for host$CHASSIS_ID DC cycle"
48 msg="Host$CHASSIS_ID system DC power is off"
60 msg="Host$CHASSIS_ID DC power cycle failed, fail to set host$CHASSIS_ID DC power off"
76 msg="Host$CHASSIS_ID DC power cycle failed, fail to set host$CHASSIS_ID DC power on"
82 msg="Host$CHASSIS_ID system DC power is on"
89 msg="Host$1 DC power cycle success"
/openbmc/u-boot/drivers/power/pmic/
H A DKconfig38 This PMIC includes 4 DC/DC step-down buck regulators and 8 low-dropout
46 The AS3722 includes 7 DC/DC buck convertors, 11 low-noise LDOs, a
128 The Rockchip RK808 PMIC provides four buck DC-DC convertors, 8 LDOs,
185 The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO
193 The TPS65090 is a PMIC containing several LDOs, DC to DC convertors,
223 SoC. It provides 4 buck DC-DC convertors and 5 LDOs, and it is accessed
230 The TPS65910 is a PMIC containing 3 buck DC-DC converters, one boost
231 DC-DC converter, 8 LDOs and a RTC. This driver binds the SMPS and LDO
/openbmc/qemu/hw/watchdog/
H A Dwdt_diag288.c113 DeviceClass *dc = DEVICE_CLASS(klass); in wdt_diag288_class_init() local
116 dc->realize = wdt_diag288_realize; in wdt_diag288_class_init()
117 dc->unrealize = wdt_diag288_unrealize; in wdt_diag288_class_init()
118 device_class_set_legacy_reset(dc, wdt_diag288_reset); in wdt_diag288_class_init()
119 dc->hotpluggable = false; in wdt_diag288_class_init()
120 set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories); in wdt_diag288_class_init()
121 dc->vmsd = &vmstate_diag288; in wdt_diag288_class_init()
123 dc->desc = "diag288 device for s390x platform"; in wdt_diag288_class_init()
/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dpower.hpp22 DC, enumerator
45 DC, enumerator
60 {PowerSupplyType::DC, "DC"},
83 {InputType::DC, "DC"},
/openbmc/qemu/hw/core/
H A Dqdev.c48 DeviceClass *dc = DEVICE_GET_CLASS(dev); in qdev_get_vmsd() local
49 return dc->vmsd; in qdev_get_vmsd()
111 DeviceClass *dc = DEVICE_GET_CLASS(dev); in qdev_set_parent_bus() local
113 assert(dc->bus_type && object_dynamic_cast(OBJECT(bus), dc->bus_type)); in qdev_set_parent_bus()
296 DeviceClass *dc; in qdev_assert_realized_properly_cb() local
299 dc = DEVICE_GET_CLASS(dev); in qdev_assert_realized_properly_cb()
301 assert(dev->parent_bus || !dc->bus_type); in qdev_assert_realized_properly_cb()
442 DeviceClass *dc = DEVICE_GET_CLASS(obj); in check_only_migratable() local
444 if (!vmstate_check_only_migratable(dc->vmsd)) { in check_only_migratable()
457 DeviceClass *dc = DEVICE_GET_CLASS(dev); in device_set_realized() local
[all …]
/openbmc/qemu/hw/virtio/
H A Dvhost-user-input.c36 DeviceClass *dc = DEVICE_CLASS(klass); in vhost_input_class_init() local
38 dc->vmsd = &vmstate_vhost_input; in vhost_input_class_init()
39 device_class_set_props(dc, vinput_properties); in vhost_input_class_init()
40 device_class_set_parent_realize(dc, vinput_realize, in vhost_input_class_init()
42 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); in vhost_input_class_init()
H A Dvhost-user-i2c.c41 DeviceClass *dc = DEVICE_CLASS(klass); in vu_i2c_class_init() local
44 dc->vmsd = &vu_i2c_vmstate; in vu_i2c_class_init()
45 device_class_set_props(dc, vi2c_properties); in vu_i2c_class_init()
46 device_class_set_parent_realize(dc, vi2c_realize, in vu_i2c_class_init()
48 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); in vu_i2c_class_init()
/openbmc/qemu/hw/display/
H A Dramfb-standalone.c72 DeviceClass *dc = DEVICE_CLASS(klass); in ramfb_class_initfn() local
74 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); in ramfb_class_initfn()
75 dc->vmsd = &ramfb_dev_vmstate; in ramfb_class_initfn()
76 dc->realize = ramfb_realizefn; in ramfb_class_initfn()
77 dc->desc = "ram framebuffer standalone device"; in ramfb_class_initfn()
78 device_class_set_props(dc, ramfb_properties); in ramfb_class_initfn()
/openbmc/phosphor-user-manager/test/
H A Dldap_config_test.cpp135 "ldap://9.194.251.136/", "cn=Users,dc=com", "cn=Users,dc=corp", in TEST_F()
141 "cn=Users,dc=test", "MyLdap123", in TEST_F()
157 EXPECT_EQ(manager.getADConfigPtr()->ldapBindDN(), "cn=Users,dc=com"); in TEST_F()
158 EXPECT_EQ(manager.getADConfigPtr()->ldapBaseDN(), "cn=Users,dc=corp"); in TEST_F()
254 "ldap://9.194.251.138/", "cn=Users,dc=com", "cn=Users,dc=corp", in TEST_F()
269 EXPECT_EQ(managerPtr->getADConfigPtr()->ldapBindDN(), "cn=Users,dc=com"); in TEST_F()
270 EXPECT_EQ(managerPtr->getADConfigPtr()->ldapBaseDN(), "cn=Users,dc=corp"); in TEST_F()
304 "ldap://9.194.251.138/", "cn=Users,dc=com", "cn=Users,dc=corp", in TEST_F()
353 "ldap://9.194.251.138/", "cn=Users,dc=com", "cn=Users,dc=corp", in TEST_F()
360 "cn=Administrator,cn=Users,dc=corp,dc=ibm,dc=com"); in TEST_F()
[all …]
/openbmc/qemu/hw/mem/
H A Dcxl_type3.c170 if (!ct3d->hostpmem && !ct3d->hostvmem && !ct3d->dc.num_regions) { in ct3_build_cdat_table()
192 if (ct3d->dc.num_regions) { in ct3_build_cdat_table()
193 if (!ct3d->dc.host_dc) { in ct3_build_cdat_table()
196 dc_mr = host_memory_backend_get_memory(ct3d->dc.host_dc); in ct3_build_cdat_table()
200 len += CT3_CDAT_NUM_ENTRIES * ct3d->dc.num_regions; in ct3_build_cdat_table()
228 for (i = 0; i < ct3d->dc.num_regions; i++) { in ct3_build_cdat_table()
229 ct3d->dc.regions[i].nonvolatile = false; in ct3_build_cdat_table()
230 ct3d->dc.regions[i].sharable = false; in ct3_build_cdat_table()
231 ct3d->dc.regions[i].hw_managed_coherency = false; in ct3_build_cdat_table()
232 ct3d->dc.regions[i].ic_specific_dc_management = false; in ct3_build_cdat_table()
[all …]
/openbmc/u-boot/board/sysam/amcore/
H A Damcore.c57 sdramctrl_t *dc = (sdramctrl_t *)(MMAP_DRAMC); in dram_init() local
82 out_be16(&dc->dcr, 0x8200 | RC); in dram_init()
87 out_be32(&dc->dacr0, 0x00003304); in dram_init()
90 out_be32(&dc->dmr0, dramsize|1); in dram_init()
93 out_be32(&dc->dacr0, 0x0000330c); in dram_init()
96 out_be32(&dc->dacr0, 0x0000b304); in dram_init()
100 out_be32(&dc->dacr0, 0x0000b344); in dram_init()
/openbmc/qemu/hw/pci-host/
H A Duninorth.c317 DeviceClass *dc = DEVICE_CLASS(klass); in unin_main_pci_host_class_init() local
328 dc->user_creatable = false; in unin_main_pci_host_class_init()
345 DeviceClass *dc = DEVICE_CLASS(klass); in u3_agp_pci_host_class_init() local
356 dc->user_creatable = false; in u3_agp_pci_host_class_init()
373 DeviceClass *dc = DEVICE_CLASS(klass); in unin_agp_pci_host_class_init() local
384 dc->user_creatable = false; in unin_agp_pci_host_class_init()
402 DeviceClass *dc = DEVICE_CLASS(klass); in unin_internal_pci_host_class_init() local
413 dc->user_creatable = false; in unin_internal_pci_host_class_init()
433 DeviceClass *dc = DEVICE_CLASS(klass); in pci_unin_main_class_init() local
436 dc->realize = pci_unin_main_realize; in pci_unin_main_class_init()
[all …]
/openbmc/qemu/hw/pci-bridge/
H A Dpci_expander_bridge.c174 DeviceClass *dc = DEVICE_CLASS(class); in pxb_host_class_init() local
178 dc->fw_name = "pci"; in pxb_host_class_init()
180 dc->user_creatable = false; in pxb_host_class_init()
229 DeviceClass *dc = DEVICE_CLASS(class); in pxb_cxl_host_class_init() local
233 dc->fw_name = "cxl"; in pxb_cxl_host_class_init()
234 dc->realize = pxb_cxl_realize; in pxb_cxl_host_class_init()
236 dc->user_creatable = false; in pxb_cxl_host_class_init()
432 DeviceClass *dc = DEVICE_CLASS(klass); in pxb_dev_class_init() local
441 dc->desc = "PCI Expander Bridge"; in pxb_dev_class_init()
442 device_class_set_props(dc, pxb_dev_properties); in pxb_dev_class_init()
[all …]
/openbmc/u-boot/tools/logos/
H A Du-boot_logo.svg7 xmlns:dc="http://purl.org/dc/elements/1.1/"
31 <dc:format>image/svg+xml</dc:format>
32 <dc:type
33 rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
34 <dc:title>U-Boot Logo</dc:title>
37 <dc:creator>
39 <dc:title>Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;</dc:title>
41 </dc:creator>
42 <dc:date>May 21st, 2018</dc:date>

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