| /openbmc/u-boot/lib/ |
| H A D | fdtdec_common.c | 24 const int *cell; in fdtdec_get_int() local
28 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_int()
29 if (cell && len >= sizeof(int)) { in fdtdec_get_int()
30 int val = fdt32_to_cpu(cell[0]); in fdtdec_get_int()
42 const int *cell; in fdtdec_get_uint() local
46 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_uint()
47 if (cell && len >= sizeof(unsigned int)) { in fdtdec_get_uint()
48 unsigned int val = fdt32_to_cpu(cell[0]); in fdtdec_get_uint()
|
| H A D | fdtdec.c | 190 const u32 *cell; in fdtdec_get_pci_addr() local
202 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_pci_addr()
203 if (!cell) in fdtdec_get_pci_addr()
212 (ulong)fdt32_to_cpu(cell[0]), in fdtdec_get_pci_addr()
213 (ulong)fdt32_to_cpu(cell[1]), in fdtdec_get_pci_addr()
214 (ulong)fdt32_to_cpu(cell[2])); in fdtdec_get_pci_addr()
215 if ((fdt32_to_cpu(*cell) & type) == type) { in fdtdec_get_pci_addr()
216 addr->phys_hi = fdt32_to_cpu(cell[0]); in fdtdec_get_pci_addr()
217 addr->phys_mid = fdt32_to_cpu(cell[1]); in fdtdec_get_pci_addr()
218 addr->phys_lo = fdt32_to_cpu(cell[1]); in fdtdec_get_pci_addr()
[all …]
|
| /openbmc/u-boot/drivers/pci/ |
| H A D | pci_sandbox.c | 82 const fdt32_t *cell; in sandbox_pci_probe() local
86 cell = ofnode_get_property(dev_ofnode(dev), "sandbox,dev-info", &len); in sandbox_pci_probe()
87 if (!cell) in sandbox_pci_probe()
96 fdt32_to_cpu(cell[0]), fdt32_to_cpu(cell[1]), in sandbox_pci_probe()
97 fdt32_to_cpu(cell[2]), fdt32_to_cpu(cell[3])); in sandbox_pci_probe()
99 pdev = fdt32_to_cpu(cell[0]); in sandbox_pci_probe()
100 pfn = fdt32_to_cpu(cell[1]); in sandbox_pci_probe()
104 priv->vendev[devfn].vendor = fdt32_to_cpu(cell[2]); in sandbox_pci_probe()
105 priv->vendev[devfn].device = fdt32_to_cpu(cell[3]); in sandbox_pci_probe()
107 cell += FDT_DEV_INFO_CELLS; in sandbox_pci_probe()
|
| /openbmc/u-boot/drivers/core/ |
| H A D | simple-bus.c | 30 u32 cell[3]; in simple_bus_post_bind()
33 ret = dev_read_u32_array(dev, "ranges", cell, ARRAY_SIZE(cell)); in simple_bus_post_bind()
37 plat->base = cell[0]; in simple_bus_post_bind()
38 plat->target = cell[1]; in simple_bus_post_bind()
39 plat->size = cell[2]; in simple_bus_post_bind()
|
| H A D | of_extra.c | 52 const fdt_addr_t *cell; in ofnode_decode_region() local
56 cell = ofnode_get_property(node, prop_name, &len); in ofnode_decode_region()
57 if (!cell || (len < sizeof(fdt_addr_t) * 2)) { in ofnode_decode_region()
58 debug("cell=%p, len=%d\n", cell, len); in ofnode_decode_region()
62 *basep = fdt_addr_to_cpu(*cell); in ofnode_decode_region()
63 *sizep = fdt_size_to_cpu(cell[1]); in ofnode_decode_region()
|
| H A D | ofnode.c | 26 const fdt32_t *cell; in ofnode_read_u32() local
29 cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), in ofnode_read_u32()
31 if (!cell || len < sizeof(int)) { in ofnode_read_u32()
35 *outp = fdt32_to_cpu(cell[0]); in ofnode_read_u32()
60 const fdt64_t *cell; in ofnode_read_u64() local
69 cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), propname, in ofnode_read_u64()
71 if (!cell || len < sizeof(*cell)) { in ofnode_read_u64()
75 *outp = fdt64_to_cpu(cell[0]); in ofnode_read_u64()
582 const fdt32_t *cell; in ofnode_read_pci_addr() local
594 cell = ofnode_get_property(node, propname, &len); in ofnode_read_pci_addr()
[all …]
|
| /openbmc/u-boot/doc/device-tree-bindings/misc/ |
| H A D | intel,irq-router.txt | 23 first cell is the register offset that controls the first PIRQ link routing.
24 The second cell is the total number of PIRQ links the router supports.
26 encoded as 2 cells a group for each link. The first cell is the PIRQ link
27 number (0 for PIRQA, 1 for PIRQB, etc). The second cell is the PIRQ routing
30 link, as specified by the first cell of intel,pirq-link.
34 encoded as 3 cells a group for a device. The first cell is the device's PCI
36 The second cell is the PCI interrupt pin used by this device. The last cell
|
| /openbmc/qemu/hw/misc/ |
| H A D | mips_itu.c | 168 return &s->cell[cell_idx]; in get_cell()
209 /* ignore a write to the semaphore cell */ in view_bypass_write()
379 ITCStorageCell *cell = get_cell(s, addr); in itc_storage_read() local
393 ret = view_bypass_read(cell); in itc_storage_read()
396 ret = view_control_read(cell); in itc_storage_read()
399 ret = view_ef_sync_read(cell); in itc_storage_read()
402 ret = view_ef_try_read(cell); in itc_storage_read()
405 ret = view_pv_sync_read(cell); in itc_storage_read()
408 ret = view_pv_try_read(cell); in itc_storage_read()
426 ITCStorageCell *cell = get_cell(s, addr); in itc_storage_write() local
[all …]
|
| /openbmc/qemu/include/hw/misc/ |
| H A D | mips_itu.h | 34 uint8_t FIFODepth; /* Log2 of the cell depth */
35 uint8_t FIFOPtr; /* Number of elements in a FIFO cell */
36 uint8_t FIFO; /* 1 - FIFO cell, 0 - Semaphore cell */
48 /* Bitmap tracking blocked threads on the cell.
64 ITCStorageCell *cell; member
|
| /openbmc/u-boot/arch/arm/mach-socfpga/ |
| H A D | pinmux_arria10.c | 16 const u32 *cell; in do_pinctr_pin() local
21 cell = fdt_getprop(blob, child, "pinctrl-single,pins", &len); in do_pinctr_pin()
22 if (!cell || len <= 0) in do_pinctr_pin()
25 debug("%p %d\n", cell, len); in do_pinctr_pin()
27 offset = fdt32_to_cpu(*cell++); in do_pinctr_pin()
28 value = fdt32_to_cpu(*cell++); in do_pinctr_pin()
|
| /openbmc/phosphor-webui/app/server-health/controllers/ |
| H A D | sensors-overview-controller.html | 49 <th class="sensors__thead-cell">Sensors ({{filteredSensorData.length}})<th>
50 <th class="sensors__thead-cell">Low critical<th>
51 <th class="sensors__thead-cell">Low warning<th>
52 <th class="sensors__thead-cell sensor__heading-current">Current<th>
53 <th class="sensors__thead-cell">High warning<th>
54 <th class="sensors__thead-cell">High critical<th>
66 <td class="sensors__tbody-cell">
74 <td class="sensors__tbody-cell">
82 …<td class="sensors__tbody-cell sensors__tbody-current" ng-class="{'sensors__tbody-current--critica…
90 <td class="sensors__tbody-cell">
[all …]
|
| /openbmc/phosphor-webui/app/common/directives/ |
| H A D | certificate.html | 3 <div class="certificate__type-cell bold">
9 <div class="certificate__issue-cell">
15 <div class="certificate__issue-cell">
21 <div class="certificate__date-cell">
27 <div class="certificate__status-cell">
39 <div class="certificate__date-cell">
45 <div class="certificate__buttons-cell row">
|
| /openbmc/u-boot/arch/x86/cpu/ |
| H A D | irq.c | 151 const u32 *cell; in create_pirq_routing_table() local
176 cell = fdt_getprop(blob, node, "intel,pirq-link", &len); in create_pirq_routing_table()
177 if (!cell || len != 8) in create_pirq_routing_table()
179 priv->link_base = fdt_addr_to_cpu(cell[0]); in create_pirq_routing_table()
180 priv->link_num = fdt_addr_to_cpu(cell[1]); in create_pirq_routing_table()
187 cell = fdt_getprop(blob, node, "intel,pirq-regmap", &len); in create_pirq_routing_table()
188 if (cell) { in create_pirq_routing_table()
206 map->link = fdt_addr_to_cpu(cell[0]); in create_pirq_routing_table()
207 map->offset = fdt_addr_to_cpu(cell[1]); in create_pirq_routing_table()
209 cell += sizeof(struct pirq_regmap) / sizeof(u32); in create_pirq_routing_table()
[all …]
|
| /openbmc/qemu/rust/qemu-api/src/ |
| H A D | cell.rs | 3 // This file is based on library/core/src/cell.rs from
49 //! ## Cell types
53 //! available in `std::cell`, the BQL allows them to be used from a
56 //! their `std::cell` counterparts, `BqlCell` and `BqlRefCell` implement the
71 //! Warning: While `BqlCell` and `BqlRefCell` are similar to their `std::cell`
72 //! counterparts, they are not interchangeable. Using `std::cell` types in
80 //! # use qemu_api::{cell::BqlRefCell, irq::InterruptSource, irq::IRQState};
107 //! the cell. That is, an `&mut T` to the inner value can never be obtained as
108 //! long as the cell is shared. The value itself cannot be directly obtained
147 //! The cell types from the previous section are useful at the boundaries
[all …]
|
| H A D | irq.rs | 15 cell::Opaque,
52 cell: BqlCell<*mut bindings::IRQState>, field
83 let ptr = self.cell.get(); in set()
92 self.cell.as_ptr() in as_ptr()
104 cell: BqlCell::new(ptr::null_mut()), in default()
|
| /openbmc/u-boot/common/ |
| H A D | common_fit.c | 14 const u32 *cell; in fdt_getprop_u32() local
17 cell = fdt_getprop(fdt, node, prop, &len); in fdt_getprop_u32()
18 if (!cell || len != sizeof(*cell)) in fdt_getprop_u32()
21 return fdt32_to_cpu(*cell); in fdt_getprop_u32()
|
| /openbmc/u-boot/doc/device-tree-bindings/gpio/ |
| H A D | nvidia,tegra20-gpio.txt | 9 - #gpio-cells : Should be two. The first cell is the pin number and the
10 second cell is used to specify optional parameters:
14 The first cell is the GPIO number.
15 The second cell is used to specify flags:
|
| /openbmc/qemu/scripts/simplebench/ |
| H A D | results_to_text.py | 88 cell = ''
94 row.append(cell)
100 cell += ' '
104 cell += '--'
110 cell += f' {col_j}{diff_pr:+}%'
111 row.append(cell)
|
| /openbmc/webui-vue/src/views/HardwareStatus/Sensors/ |
| H A D | Sensors.vue | 14 <table-cell-count
17 ></table-cell-count>
70 <template #cell(checkbox)="row">
79 <template #cell(status)="{ value }">
82 <template #cell(currentValue)="data">
85 <template #cell(lowerCaution)="data">
88 <template #cell(upperCaution)="data">
91 <template #cell(lowerCritical)="data">
94 <template #cell(upperCritical)="data">
|
| /openbmc/u-boot/doc/device-tree-bindings/i2c/ |
| H A D | nvidia,tegra186-bpmp-i2c.txt | 21 Single-cell integer.
24 Single-cell integer.
27 Single-cell integer.
|
| /openbmc/u-boot/arch/microblaze/cpu/ |
| H A D | timer.c | 50 u32 cell[2]; in timer_init() local
69 cell, ARRAY_SIZE(cell)); in timer_init()
73 irq = cell[0]; in timer_init()
|
| /openbmc/u-boot/drivers/pinctrl/ath79/ |
| H A D | pinctrl_ar933x.c | 74 u32 cell[2]; in ar933x_pinctrl_get_periph_id() local
78 "interrupts", cell, ARRAY_SIZE(cell)); in ar933x_pinctrl_get_periph_id()
82 switch (cell[0]) { in ar933x_pinctrl_get_periph_id()
|
| H A D | pinctrl_qca953x.c | 94 u32 cell[2]; in qca953x_pinctrl_get_periph_id() local
98 "interrupts", cell, ARRAY_SIZE(cell)); in qca953x_pinctrl_get_periph_id()
102 switch (cell[0]) { in qca953x_pinctrl_get_periph_id()
|
| /openbmc/u-boot/include/dt-bindings/pwm/ |
| H A D | pwm.h | 4 * Most PWM bindings can include a flags cell as part of the PWM specifier.
5 * In most cases, the format of the flags cell uses the standard values
|
| /openbmc/u-boot/include/dt-bindings/interrupt-controller/ |
| H A D | irq.h | 4 * Most IRQ bindings include a flags cell as part of the IRQ specifier.
5 * In most cases, the format of the flags cell uses the standard values
|