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/openbmc/linux/drivers/crypto/amcc/
H A Dcrypto4xx_sa.h275 get_dynamic_sa_offset_state_ptr_field(struct dynamic_sa_ctl *cts) in get_dynamic_sa_offset_state_ptr_field() argument
279 offset = cts->sa_contents.bf.key_size in get_dynamic_sa_offset_state_ptr_field()
280 + cts->sa_contents.bf.inner_size in get_dynamic_sa_offset_state_ptr_field()
281 + cts->sa_contents.bf.outer_size in get_dynamic_sa_offset_state_ptr_field()
282 + cts->sa_contents.bf.spi in get_dynamic_sa_offset_state_ptr_field()
283 + cts->sa_contents.bf.seq_num0 in get_dynamic_sa_offset_state_ptr_field()
284 + cts->sa_contents.bf.seq_num1 in get_dynamic_sa_offset_state_ptr_field()
285 + cts->sa_contents.bf.seq_num_mask0 in get_dynamic_sa_offset_state_ptr_field()
286 + cts->sa_contents.bf.seq_num_mask1 in get_dynamic_sa_offset_state_ptr_field()
287 + cts->sa_contents.bf.seq_num_mask2 in get_dynamic_sa_offset_state_ptr_field()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_afmt.c34 /* Clock N CTS N CTS N CTS */
49 * calculate CTS and N values if they are not found in the table
51 static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) in amdgpu_afmt_calc_cts() argument
53 int n, cts; in amdgpu_afmt_calc_cts() local
58 cts = clock * 1000; in amdgpu_afmt_calc_cts()
61 div = gcd(n, cts); in amdgpu_afmt_calc_cts()
64 cts /= div; in amdgpu_afmt_calc_cts()
73 cts *= mul; in amdgpu_afmt_calc_cts()
82 *CTS = cts; in amdgpu_afmt_calc_cts()
84 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", in amdgpu_afmt_calc_cts()
[all …]
/openbmc/linux/drivers/crypto/intel/keembay/
H A DKconfig17 enabled: ecb(aes), cts(cbc(aes)), ecb(sm4) and cts(cbc(sm4)).
31 bool "Support for Intel Keem Bay OCS AES/SM4 CTS HW acceleration"
35 AES/SM4 CBC with CTS mode hardware acceleration for use with
38 Provides OCS version of cts(cbc(aes)) and cts(cbc(sm4)).
40 Intel does not recommend use of CTS mode with AES/SM4.
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
16 * card must be disabled and the uart1 rts/cts must be output on other DHCOM
73 * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
74 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
77 cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */
86 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property
121 * M: uart1 cts
/openbmc/linux/drivers/gpu/drm/bridge/adv7511/
H A Dadv7511_audio.c18 unsigned int *cts, unsigned int *n) in adv7511_calc_cts_n() argument
34 *cts = ((f_tmds * *n) / (128 * fs)) * 1000; in adv7511_calc_cts_n()
39 unsigned int cts = 0; in adv7511_update_cts_n() local
42 adv7511_calc_cts_n(adv7511->f_tmds, adv7511->f_audio, &cts, &n); in adv7511_update_cts_n()
49 (cts >> 16) & 0xf); in adv7511_update_cts_n()
51 (cts >> 8) & 0xff); in adv7511_update_cts_n()
53 cts & 0xff); in adv7511_update_cts_n()
171 /* enable N/CTS, enable Audio sample packets */ in audio_startup()
174 /* enable N/CTS */ in audio_startup()
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-370-pinctrl.txt26 mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)
48 mpp27 27 gpio, ge0(rxd4), ge1(rxd2), uart0(cts)
59 mpp38 38 gpio, dev(ready), uart1(cts), uart0(cts)
73 mpp50 50 gpio, dev(ad11), uart0(cts), sd0(d1), spi1(miso),
82 mpp56 56 gpio, dev(cs2), uart1(cts), uart0(cts), spi0(cs3),
92 mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
93 audio(mclk), uart0(cts)
H A Dmarvell,kirkwood-pinctrl.txt34 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
43 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
72 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
81 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
116 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
125 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
165 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
174 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
228 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), mii(crs),
238 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
[all …]
H A Dmarvell,dove-pinctrl.txt19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
23 uart1(cts), lcd-spi(cs1), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp),
40 mpp17 17 gpio, uart3(cts), sdio0(wp), ac97(sdi2), twsi(sda),
47 uart1(cts), ssp(sfrm)
49 lcd-spi(mosi), uart1(cts), ssp(txd)
/openbmc/linux/net/sunrpc/
H A DKconfig47 SHA-1 digests. These include aes128-cts-hmac-sha1-96 and
48 aes256-cts-hmac-sha1-96.
60 camellia128-cts-cmac and camellia256-cts-cmac.
72 SHA-2 digests. These include aes128-cts-hmac-sha256-128 and
73 aes256-cts-hmac-sha384-192.
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/vk-gl-cts/
H A Dopengl-es-cts_3.2.11.0.bb1 DESCRIPTION = "OpenGL CTS"
3 require khronos-cts.inc
5 SRCREV_vk-gl-cts = "66956d195169596472e956e3aebf2df8e3bd960d"
7 require opengl-es-cts-sources.inc
9 EXTRA_OECMAKE += "-DSELECTED_BUILD_TARGETS="cts-runner deqp-egl deqp-gles2 deqp-gles3 deqp-gles31 d…
H A Dvulkan-cts_1.3.9.2.bb1 DESCRIPTION = "Vulkan CTS"
3 require khronos-cts.inc
5 SRCREV_vk-gl-cts = "24c1b1498ba4f05777f47541968ffe686265c645"
7 require vulkan-cts-sources.inc
/openbmc/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_audio.c26 uint32_t cts; /* CTS parameter for clock regeneration */ member
110 /* Clear N/CTS selection bits */ in msm_hdmi_audio_update()
114 uint32_t n, cts, multiplier; in msm_hdmi_audio_update() local
119 cts = arcs->lut[audio->rate].cts; in msm_hdmi_audio_update()
133 DBG("n=%u, cts=%u, multiplier=%u", n, cts, multiplier); in msm_hdmi_audio_update()
153 HDMI_ACR_0_CTS(cts)); in msm_hdmi_audio_update()
/openbmc/u-boot/drivers/video/
H A Ddw_hdmi.c16 u32 cts; member
22 .tmds = 25175000, .n = 6144, .cts = 25175,
24 .tmds = 25200000, .n = 6144, .cts = 25200,
26 .tmds = 27000000, .n = 6144, .cts = 27000,
28 .tmds = 27027000, .n = 6144, .cts = 27027,
30 .tmds = 40000000, .n = 6144, .cts = 40000,
32 .tmds = 54000000, .n = 6144, .cts = 54000,
34 .tmds = 54054000, .n = 6144, .cts = 54054,
36 .tmds = 65000000, .n = 6144, .cts = 65000,
38 .tmds = 74176000, .n = 11648, .cts = 140625,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dserial.yaml28 cts-gpios:
32 the UART's CTS line.
68 for RTS/CTS hardware flow control, and that they are available for use
76 cts-rts-swap:
78 description: CTS and RTS pins are swapped.
95 cts-gpios: false
H A Dmicrochip,pic32-uart.txt14 - cts-gpios: CTS pin for UART
28 cts-gpios = <&gpio1 15 0>;
H A Dcirrus,clps711x-uart.txt11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
28 cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
H A Dst,stm32-uart.yaml50 # cts-gpios and rts-gpios properties can be used instead of 'uart-has-rtscts'
54 # It should be noted that both cts-gpios/rts-gpios and 'uart-has-rtscts' or
56 cts-gpios: true
81 cts-gpios: false
/openbmc/linux/tools/firewire/
H A Ddecode-fcp.c141 uint32_t cts:4; member
186 switch (frame->cts) { in decode_fcp()
191 printf("cal fcp frame (cts=0x01)\n"); in decode_fcp()
194 printf("ehs fcp frame (cts=0x02)\n"); in decode_fcp()
197 printf("havi fcp frame (cts=0x03)\n"); in decode_fcp()
200 printf("vendor specific fcp frame (cts=0x0e)\n"); in decode_fcp()
203 printf("extended cts\n"); in decode_fcp()
206 printf("reserved fcp frame (ctx=0x%02x)\n", frame->cts); in decode_fcp()
/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_common.c52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) in hdmi_compute_acr() argument
57 if (n == NULL || cts == NULL) in hdmi_compute_acr()
65 * specification) yields to an non-integer CTS. Hence, we in hdmi_compute_acr()
145 /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ in hdmi_compute_acr()
146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10); in hdmi_compute_acr()
/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_common.c52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) in hdmi_compute_acr() argument
57 if (n == NULL || cts == NULL) in hdmi_compute_acr()
65 * specification) yields to an non-integer CTS. Hence, we in hdmi_compute_acr()
145 /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ in hdmi_compute_acr()
146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10); in hdmi_compute_acr()
/openbmc/linux/samples/bpf/
H A Dcpustat_kern.c106 u64 *cts, *pts, *cstate, *pstate, prev_state, cur_ts, delta; in bpf_prog1() local
116 cts = bpf_map_lookup_elem(&my_map, &key); in bpf_prog1()
117 if (!cts) in bpf_prog1()
138 if (!*cts) { in bpf_prog1()
139 *cts = bpf_ktime_get_ns(); in bpf_prog1()
144 delta = cur_ts - *cts; in bpf_prog1()
145 *cts = cur_ts; in bpf_prog1()
194 * cts cur_ts in bpf_prog1()
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dtso5 * GW73xx RS232 with RTS/CTS hardware flow control:
8 * - UART4_RX becomes CTS
35 cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dtso5 * GW72xx RS232 with RTS/CTS hardware flow control:
8 * - UART4_RX becomes CTS
35 cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
/openbmc/linux/net/sunrpc/auth_gss/
H A Dgss_krb5_test.c469 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 1",
477 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 2",
485 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 3",
493 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 4",
501 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 5",
509 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 6",
662 .desc = "Derive Kc subkey for camellia128-cts-cmac",
669 .desc = "Derive Ke subkey for camellia128-cts-cmac",
676 .desc = "Derive Ki subkey for camellia128-cts-cmac",
683 .desc = "Derive Kc subkey for camellia256-cts-cmac",
[all …]
/openbmc/linux/drivers/staging/vt6656/
H A Drxtx.h106 /* CTS buffer header */
121 /* cts g */
123 /* no rts/cts */
143 struct vnt_rrv_time_cts cts; member

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