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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
29 cpu = <&cpu0>;
32 cpu = <&cpu1>;
35 cpu = <&cpu2>;
38 cpu = <&cpu3>;
43 cpu0: cpu@a00 {
44 device_type = "cpu";
[all …]
H A Dexynos4212.dtsi1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
29 cpu = <&cpu0>;
32 cpu = <&cpu1>;
37 cpu0: cpu@a00 {
38 device_type = "cpu";
39 compatible = "arm,cortex-a9";
42 clock-names = "cpu";
[all …]
/openbmc/linux/arch/arm64/boot/dts/apple/
H A Dt600x-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
18 cpu-map {
21 cpu = <&cpu_e00>;
24 cpu = <&cpu_e01>;
30 cpu = <&cpu_p00>;
33 cpu = <&cpu_p01>;
[all …]
H A Dt8112.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <2>;
[all …]
H A Dt8103.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 compatible = "apple,t8103", "apple,arm-platform";
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <2>;
23 #size-cells = <0>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
22 - |
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
28 #address-cells = <1>;
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H A Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
17 the CPU frequencies subset and voltage value of each OPP varies based on
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
29 const: operating-points-v2-kryo-cpu
[all …]
/openbmc/linux/Documentation/trace/
H A Dtimerlat-tracer.rst6 find sources of wakeup latencies of real-time threads. Like cyclictest,
13 -----
28 # _-----=> irqs-off
29 # / _----=> need-resched
30 # | / _---=> hardirq/softirq
31 # || / _--=> preempt-depth
34 # TASK-PID CPU# |||| TIMESTAMP ID CONTEXT LATENCY
36 <idle>-0 [000] d.h1 54.029328: #1 context irq timer_latency 932 ns
37 <...>-867 [000] .... 54.029339: #1 context thread timer_latency 11700 ns
38 <idle>-0 [001] dNh1 54.029346: #1 context irq timer_latency 2833 ns
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/openbmc/qemu/include/hw/arm/
H A Darmv7m.h2 * ARMv7M CPU object
20 #define TYPE_BITBAND "ARM-bitband-memory"
44 * + Property "cpu-type": CPU type to instantiate
45 * + Property "num-irq": number of external IRQ lines
46 * + Property "num-prio-bits": number of priority bits in the NVIC
48 * that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
50 * + Property "idau": IDAU interface (forwarded to CPU object)
51 * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object)
52 * + Property "init-nsvtor": non-secure VTOR reset value (forwarded to CPU object)
53 * + Property "vfp": enable VFP (forwarded to CPU object)
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am625.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
12 #include "k3-am62.dtsi"
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu-map {
22 cpu = <&cpu0>;
26 cpu = <&cpu1>;
30 cpu = <&cpu2>;
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
46 #include <dt-bindings/thermal/thermal.h>
49 cpu0_opp_table: opp-table-cpu {
50 compatible = "operating-points-v2";
51 opp-shared;
53 opp-120000000 {
54 opp-hz = /bits/ 64 <120000000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qm.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/pads-imx8qm.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/cpufreq/
H A Dapple,cluster-cpufreq.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
13 Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of
15 operating-points-v2 table to define the CPU performance states, with the
16 opp-level property specifying the hardware p-state index for that level.
21 - items:
22 - enum:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/powerpc/opal/
H A Dpower-mgt.txt1 IBM Power-Management Bindings
6 node @power-mgt in the device-tree by the firmware.
9 ----------------
12 - name: The name of the idle state as defined by the firmware.
14 - flags: indicating some aspects of this idle states such as the
15 extent of state-loss, whether timebase is stopped on this
18 - exit-latency: The latency involved in transitioning the state of the
19 CPU from idle to running.
21 - target-residency: The minimum time that the CPU needs to reside in
22 this idle state in order to accrue power-savings
[all …]
/openbmc/linux/tools/perf/scripts/python/
H A Dfutex-contention.py18 '/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
25 lock_waits = {} # long-lived stats on (tid,lock) blockage elapsed time
26 process_names = {} # long-lived pid-to-execname mapping
29 def syscalls__sys_enter_futex(event, ctxt, cpu, s, ns, tid, comm, callchain, argument
37 thread_blocktime[tid] = nsecs(s, ns)
40 def syscalls__sys_exit_futex(event, ctxt, cpu, s, ns, tid, comm, callchain, argument
43 elapsed = nsecs(s, ns) - thread_blocktime[tid]
56 print("%s[%d] lock %x contended %d times, %d avg ns [max: %d ns, min %d ns]" %
/openbmc/qemu/hw/arm/
H A Darmv7m.c4 * Copyright (c) 2006-2007 CodeSourcery.
16 #include "hw/qdev-properties.h"
17 #include "hw/qdev-clock.h"
20 #include "qemu/error-report.h"
24 #include "target/arm/cpu.h"
25 #include "target/arm/cpu-features.h"
26 #include "target/arm/cpu-qom.h"
34 return s->base | (offset & 0x1ffffff) >> 5; in bitband_addr()
49 addr = bitband_addr(s, offset) & (-size); in bitband_read()
50 res = address_space_read(&s->source_as, addr, attrs, buf, size); in bitband_read()
[all …]
/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7110-starfive-visionfive-2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
30 timebase-frequency = <4000000>;
38 gpio-restart {
39 compatible = "gpio-restart";
46 clock-frequency = <74250000>;
50 clock-frequency = <125000000>;
[all …]
/openbmc/linux/drivers/of/
H A Dfdt_address.c1 // SPDX-License-Identifier: GPL-2.0+
3 * FDT Address translation based on u-boot fdt_support.c which in turn was
9 * Copyright 2010-2011 Freescale Semiconductor, Inc.
22 #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ argument
23 (ns) > 0)
30 while(na--) in of_dump_addr()
43 int na, int ns, int pna);
54 prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL); in fdt_bus_default_count_cells()
62 prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); in fdt_bus_default_count_cells()
71 int na, int ns, int pna) in fdt_bus_default_map() argument
[all …]
/openbmc/linux/kernel/locking/
H A Dqspinlock_stat.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 * PV specific per-cpu counter
30 * Average kick latency (ns) = pv_latency_kick/pv_kick_unlock
32 * Average wake latency (ns) = pv_latency_wake/pv_kick_wake
40 int cpu, id, len; in lockevent_read() local
44 * Get the counter ID stored in file->f_inode->i_private in lockevent_read()
46 id = (long)file_inode(file)->i_private; in lockevent_read()
49 return -EBADF; in lockevent_read()
51 for_each_possible_cpu(cpu) { in lockevent_read()
52 sum += per_cpu(lockevents[id], cpu); in lockevent_read()
[all …]
/openbmc/linux/arch/powerpc/kernel/
H A Dsysfs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/cpu.h>
33 static DEFINE_PER_CPU(struct cpu, cpu_devices);
39 * smt-snooze-delay cleanup.") and has been broken even longer. As was foretold in
45 * powerpc-utils stopped using it as of 1.3.8. At some point in the future this
55 current->comm, current->pid); in store_smt_snooze_delay()
64 current->comm, current->pid); in show_smt_snooze_delay()
76 pr_warn("smt-snooze-delay command line option has no effect\n"); in setup_smt_snooze_delay()
79 __setup("smt-snooze-delay=", setup_smt_snooze_delay);
99 struct cpu *cpu = container_of(dev, struct cpu, dev); \
[all …]
/openbmc/linux/arch/powerpc/boot/
H A Dsimpleboot.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * The simple platform -- for booting when firmware doesn't supply a device
28 const u32 *na, *ns, *reg, *timebase; in platform_init() local
36 /* Find the #address-cells and #size-cells properties */ in platform_init()
40 na = fdt_getprop(_dtb_start, node, "#address-cells", &size); in platform_init()
42 fatal("Cannot find #address-cells property"); in platform_init()
43 ns = fdt_getprop(_dtb_start, node, "#size-cells", &size); in platform_init()
44 if (!ns || (size != 4)) in platform_init()
45 fatal("Cannot find #size-cells property"); in platform_init()
48 node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", in platform_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/reserved-memory/
H A Dnvidia,tegra264-bpmp-shmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra CPU-NS - BPMP IPC reserved memory
10 - Peter De Schrijver <pdeschrijver@nvidia.com>
13 Define a memory region used for communication between CPU-NS and BPMP.
15 has to be known to both CPU-NS and BPMP for correct IPC operation.
16 The memory region is defined using a child node under /reserved-memory.
17 The sub-node is named shmem@<address>.
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsun8i-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
46 #include <dt-bindings/thermal/thermal.h>
50 compatible = "operating-points-v2";
51 opp-shared;
53 opp-120000000 {
54 opp-hz = /bits/ 64 <120000000>;
55 opp-microvolt = <1040000>;
[all …]
/openbmc/qemu/include/sysemu/
H A Dcpu-timers.h2 * CPU timers state API
7 * See the COPYING file in the top-level directory.
15 /* init the whole cpu timers API, including icount, ticks, and cpu_throttle */
18 /* icount - Instruction Counter API */
23 * @ICOUNT_DISABLED: Disabled - Do not count executed instructions.
24 * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" option
25 * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shift
42 * cpus-tcg vCPU thread so the main-loop can see time has moved forward.
44 void icount_update(CPUState *cpu);
49 /* return the virtual CPU time in ns, based on the instruction counter. */
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996pro.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ opp-table-cluster0;
10 /delete-node/ opp-table-cluster1;
18 cluster0_opp: opp-table-cluster0 {
19 compatible = "operating-points-v2-kryo-cpu";
20 nvmem-cells = <&speedbin_efuse>;
21 opp-shared;
23 opp-307200000 {
24 opp-hz = /bits/ 64 <307200000>;
25 opp-supported-hw = <0x70>;
[all …]

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