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Searched full:clk_peri_ap_dma (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi530 clocks = <&pericfg CLK_PERI_AP_DMA>;
584 clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>;
596 clocks = <&pericfg CLK_PERI_I2C1>, <&pericfg CLK_PERI_AP_DMA>;
608 clocks = <&pericfg CLK_PERI_I2C2>, <&pericfg CLK_PERI_AP_DMA>;
620 clocks = <&pericfg CLK_PERI_I2C3>, <&pericfg CLK_PERI_AP_DMA>;
632 clocks = <&pericfg CLK_PERI_I2C4>, <&pericfg CLK_PERI_AP_DMA>;
H A Dmt2712e.dtsi411 clocks = <&pericfg CLK_PERI_AP_DMA>;
512 <&pericfg CLK_PERI_AP_DMA>;
527 <&pericfg CLK_PERI_AP_DMA>;
542 <&pericfg CLK_PERI_AP_DMA>;
591 <&pericfg CLK_PERI_AP_DMA>;
606 <&pericfg CLK_PERI_AP_DMA>;
621 <&pericfg CLK_PERI_AP_DMA>;
H A Dmt8173.dtsi714 <&pericfg CLK_PERI_AP_DMA>;
730 <&pericfg CLK_PERI_AP_DMA>;
746 <&pericfg CLK_PERI_AP_DMA>;
803 <&pericfg CLK_PERI_AP_DMA>;
819 <&pericfg CLK_PERI_AP_DMA>;
843 <&pericfg CLK_PERI_AP_DMA>;
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dmediatek,uart-dma.yaml117 clocks = <&pericfg CLK_PERI_AP_DMA>;
/openbmc/linux/include/dt-bindings/clock/
H A Dmt8135-clk.h158 #define CLK_PERI_AP_DMA 20 macro
H A Dmediatek,mt6795-clk.h187 #define CLK_PERI_AP_DMA 12 macro
H A Dmt8173-clk.h206 #define CLK_PERI_AP_DMA 13 macro
H A Dmt2712-clk.h250 #define CLK_PERI_AP_DMA 11 macro
H A Dmt2701-clk.h234 #define CLK_PERI_AP_DMA 13 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c63 GATE_PERI0(CLK_PERI_AP_DMA, "peri_ap_dma", "axi_sel", 12),
H A Dclk-mt6795-pericfg.c52 GATE_PERI(CLK_PERI_AP_DMA, "peri_ap_dma", "axi_sel", 12),
H A Dclk-mt8135.c469 GATE_PERI0(CLK_PERI_AP_DMA, "ap_dma_ck", "axi_sel", 12),
H A Dclk-mt2712.c896 GATE_PERI0(CLK_PERI_AP_DMA, "per_ap_dma", "axi_sel", 13),
H A Dclk-mt2701.c843 GATE_PERI0(CLK_PERI_AP_DMA, "ap_dma_ck", "axi_sel", 12),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi301 clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>;
315 clocks = <&pericfg CLK_PERI_I2C1>, <&pericfg CLK_PERI_AP_DMA>;
329 clocks = <&pericfg CLK_PERI_I2C2>, <&pericfg CLK_PERI_AP_DMA>;
H A Dmt7623.dtsi443 <&pericfg CLK_PERI_AP_DMA>;
458 <&pericfg CLK_PERI_AP_DMA>;
473 <&pericfg CLK_PERI_AP_DMA>;
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h227 #define CLK_PERI_AP_DMA 12 macro
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c659 GATE_PERI0(CLK_PERI_AP_DMA, CLK_TOP_AXI_SEL, 12),