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/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,mmcc-msm8994.h26 #define BYTE0_CLK_SRC 16 macro
H A Dqcom,mmcc-msm8974.h42 #define BYTE0_CLK_SRC 33 macro
H A Dqcom,mmcc-sdm660.h10 #define BYTE0_CLK_SRC 1 macro
H A Dqcom,gcc-msm8916.h52 #define BYTE0_CLK_SRC 43 macro
H A Dqcom,mmcc-apq8084.h47 #define BYTE0_CLK_SRC 38 macro
H A Dqcom,gcc-msm8917.h24 #define BYTE0_CLK_SRC 17 macro
H A Dqcom,mmcc-msm8998.h25 #define BYTE0_CLK_SRC 16 macro
H A Dqcom,gcc-msm8939.h52 #define BYTE0_CLK_SRC 43 macro
H A Dqcom,gcc-msm8909.h37 #define BYTE0_CLK_SRC 25 macro
H A Dqcom,gcc-msm8953.h30 #define BYTE0_CLK_SRC 23 macro
H A Dqcom,mmcc-msm8996.h42 #define BYTE0_CLK_SRC 33 macro
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,msm8998-mdss.yaml152 assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
/openbmc/linux/drivers/clk/qcom/
H A Dmmcc-msm8974.c813 static struct clk_rcg2 byte0_clk_src = { variable
819 .name = "byte0_clk_src",
1845 &byte0_clk_src.clkr.hw
2462 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
2584 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dmmcc-msm8998.c466 static struct clk_rcg2 byte0_clk_src = { variable
471 .name = "byte0_clk_src",
1430 .parent_hws = (const struct clk_hw *[]){ &byte0_clk_src.clkr.hw },
1580 .parent_hws = (const struct clk_hw *[]){ &byte0_clk_src.clkr.hw },
2647 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dmmcc-sdm660.c491 static struct clk_rcg2 byte0_clk_src = { variable
497 .name = "byte0_clk_src",
2100 .parent_hws = (const struct clk_hw *[]){ &byte0_clk_src.clkr.hw },
2119 .parent_hws = (const struct clk_hw *[]){ &byte0_clk_src.clkr.hw },
2641 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dgcc-msm8909.c486 static struct clk_rcg2 byte0_clk_src = { variable
491 .name = "byte0_clk_src",
2047 &byte0_clk_src.clkr.hw,
2516 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dmmcc-msm8994.c951 static struct clk_rcg2 byte0_clk_src = { variable
956 .name = "byte0_clk_src",
1887 .parent_hws = (const struct clk_hw *[]){ &byte0_clk_src.clkr.hw },
2424 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dgcc-msm8917.c535 static struct clk_rcg2 byte0_clk_src = { variable
540 .name = "byte0_clk_src",
2515 &byte0_clk_src.clkr.hw,
3068 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dmmcc-apq8084.c848 static struct clk_rcg2 byte0_clk_src = { variable
853 .name = "byte0_clk_src",
2104 &byte0_clk_src.clkr.hw
2931 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dgcc-msm8916.c1027 static struct clk_rcg2 byte0_clk_src = { variable
1032 .name = "byte0_clk_src",
2553 &byte0_clk_src.clkr.hw,
3184 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dgcc-qcs404.c710 static struct clk_rcg2 byte0_clk_src = { variable
716 .name = "byte0_clk_src",
1944 &byte0_clk_src.clkr.hw,
2634 [GCC_BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dmmcc-msm8996.c792 static struct clk_rcg2 byte0_clk_src = { variable
797 .name = "byte0_clk_src",
2075 &byte0_clk_src.clkr.hw
3367 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dgcc-msm8953.c642 static struct clk_rcg2 byte0_clk_src = { variable
647 .name = "byte0_clk_src",
3218 &byte0_clk_src.clkr.hw,
4142 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dgcc-msm8939.c1282 static struct clk_rcg2 byte0_clk_src = { variable
1287 .name = "byte0_clk_src",
2875 &byte0_clk_src.clkr.hw,
3714 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
H A Dgcc-msm8976.c1252 static struct clk_rcg2 byte0_clk_src = { variable
1258 .name = "byte0_clk_src",
2855 &byte0_clk_src.clkr.hw,
4027 [GCC_MDSS_BYTE0_CLK_SRC] = &byte0_clk_src.clkr,

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