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/openbmc/linux/Documentation/arch/x86/
H A Dzero-page.rst16 000/040 ALL screen_info Text mode or frame buffer information
18 040/014 ALL apm_bios_info APM BIOS information (struct apm_bios_info)
19 058/008 ALL tboot_addr Physical address of tboot shared page
20 060/010 ALL ist_info Intel SpeedStep (IST) BIOS support information
22 070/008 ALL acpi_rsdp_addr Physical address of ACPI RSDP table
23 080/010 ALL hd0_info hd0 disk parameter, OBSOLETE!!
24 090/010 ALL hd1_info hd1 disk parameter, OBSOLETE!!
25 0A0/010 ALL sys_desc_table System description table (struct sys_desc_table),
27 0B0/010 ALL olpc_ofw_header OLPC's OpenFirmware CIF and friends
28 0C0/004 ALL ext_ramdisk_image ramdisk_image high 32bits
[all …]
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-matmap.h8 * In the Xtensa processor products released to date, all parameters
36 in all copies or substantial portions of the Software.
133 #define XCHAL_CA_ILLEGAL 12 /* no access allowed (all cause exceptions) mode */
164 * all its fields (VPN, PPN, ASID, CA) are all writable, and it
170 * - must have all writable VPN and PPN fields;
230 #define XCHAL_ITLB_SET0_ASID_CONSTMASK 0 /* constant ASID bits; 0 if all writable */
231 …LB_SET0_VPN_CONSTMASK 0 /* constant VPN bits, not including entry index bits; 0 if all writable */
232 #define XCHAL_ITLB_SET0_PPN_CONSTMASK 0 /* constant PPN bits, including entry index bits; 0 if all
233 #define XCHAL_ITLB_SET0_CA_CONSTMASK 0 /* constant CA bits; 0 if all writable */
234 #define XCHAL_ITLB_SET0_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 other…
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dconfig.mk21 ALL-y += u-boot-spl_HS_MLO
22 ALL-y += u-boot-spl_HS_ULO
23 ALL-y += u-boot-spl_HS_X-LOADER
30 # For booting spl from all other media use
33 ALL-y += u-boot-spl_HS_SPI_X-LOADER
34 ALL-y += u-boot-spl_HS_ISSW
50 ALL-y += u-boot-spl_HS_SPI_X-LOADER
51 ALL-y += u-boot-spl_HS_X-LOADER
52 ALL-y += u-boot-spl_HS_MLO
53 ALL-y += u-boot-spl_HS_2ND
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen4/
H A Drecommended.json12 "BriefDescription": "All data cache accesses.",
17 "BriefDescription": "All L2 cache accesses.",
18 …r": "l2_request_g1.all_no_prefetch + l2_pf_hit_l2.all + l2_pf_miss_l2_hit_l3.all + l2_pf_miss_l2_l…
36 "MetricExpr": "l2_pf_hit_l2.all + l2_pf_miss_l2_hit_l3.all + l2_pf_miss_l2_l3.all",
41 "BriefDescription": "All L2 cache misses.",
42 …etricExpr": "l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3.all + l2_pf_miss_l2_l3.all",
60 "MetricExpr": "l2_pf_miss_l2_hit_l3.all + l2_pf_miss_l2_l3.all",
65 "BriefDescription": "All L2 cache hits.",
66 "MetricExpr": "l2_cache_req_stat.ic_dc_hit_in_l2 + l2_pf_hit_l2.all",
84 "MetricExpr": "l2_pf_hit_l2.all",
[all …]
/openbmc/linux/include/net/netfilter/
H A Dnf_conntrack_tuple.h26 #define NF_CT_TUPLE_L3SIZE ARRAY_SIZE(((union nf_inet_addr *)NULL)->all)
45 __be16 all; member
90 &t->src.u3.ip, ntohs(t->src.u.all), in nf_ct_dump_tuple_ip()
91 &t->dst.u3.ip, ntohs(t->dst.u.all)); in nf_ct_dump_tuple_ip()
100 t->src.u3.all, ntohs(t->src.u.all), in nf_ct_dump_tuple_ipv6()
101 t->dst.u3.all, ntohs(t->dst.u.all)); in nf_ct_dump_tuple_ipv6()
131 t1->src.u.all == t2->src.u.all && in __nf_ct_tuple_src_equal()
139 t1->dst.u.all == t2->dst.u.all && in __nf_ct_tuple_dst_equal()
155 m1->src.u.all == m2->src.u.all); in nf_ct_tuple_mask_equal()
166 if ((t1->src.u3.all[count] ^ t2->src.u3.all[count]) & in nf_ct_tuple_src_mask_cmp()
[all …]
/openbmc/openbmc/poky/meta/files/common-licenses/
H A DCECILL-1.127 This Agreement may apply to any or all software for which the holder of the economic rights decides…
33 Agreement: means this Licensing Agreement, and any or all of its subsequent versions.
41 Source Code: means all the Software's instructions and program lines to which access is required so…
51 Licensor: means the Holder, or any or all other individual or legal entity, that distributes the So…
53 … mean any or all modifications, corrections, translations, adaptations and/or new functionalities …
57 Dynamic Module: means any or all module, created by the Contributor, that is independent of the Sof…
59 Static Module: means any or all module, created by the Contributor and connected to the Software by…
72 …(i) loading the Software by any or all means, notably, by downloading from a remote server, or by …
89 …that accepts such, the following rights as regards the Software for any or all use, and for the te…
96 …1. permanent or temporary reproduction of all or part of the Software by any or all means and in a…
[all …]
H A D3D-Slicer-1.010 Slicer. Part C of this Agreement applies to all transactions with
12 Slicer, all of the paragraphs of Part B of this Agreement must be
19 (collectively, the "Software") constitutes acceptance of all of the
33 2. This Contribution Agreement applies to all Contributions made to
38 grant all licenses granted in this Contribution Agreement with
40 any patient data, all such data is de-identified in accordance with
45 properly authorized and in compliance with all applicable laws and
46 regulations; and (iii) you have preserved in the Contribution all
50 3. Except for the licenses granted in this Agreement, you reserve all
95 (a) you accept and adhere to all of the terms and conditions of this
[all …]
H A DCECILL-2.145 users so as to preserve this status for all subsequent redistributions.
65 This Agreement may apply to any or all software for which the holder of
92 Source Code: means all the Software's instructions and program lines to
108 Contribution: means any or all modifications, corrections, translations,
110 all Contributors, as well as any or all Internal Modules.
116 External Module: means any or all Modules, not derived from the
120 Internal Module: means any or all Module, connected to the Software so
151 * (i) loading the Software by any or all means, notably, by
182 rights over the Software for any or all use, and for the term of the
186 protecting all or part of the functions of the Software or of its
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/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Dvirtual-memory.json3 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
7 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
33 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
41 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
45 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
50 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
54 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
59 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
63 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
77 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Dvirtual-memory.json3 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
7 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
33 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
41 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
45 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
50 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
54 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
59 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
63 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
77 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A Dvirtual-memory.json3 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
7 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
33 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
41 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
45 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
50 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
54 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
59 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
63 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
77 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
[all …]
H A Dmemory.json196 "BriefDescription": "Counts all demand & prefetch data reads",
205 "BriefDescription": "Counts all demand & prefetch data reads",
214 "BriefDescription": "Counts all demand & prefetch data reads",
223 "BriefDescription": "Counts all demand & prefetch data reads",
232 "BriefDescription": "Counts all demand & prefetch data reads",
241 "BriefDescription": "Counts all demand & prefetch data reads",
250 "BriefDescription": "Counts all demand & prefetch data reads",
259 "BriefDescription": "Counts all demand & prefetch data reads",
268 "BriefDescription": "Counts all demand & prefetch data reads",
277 "BriefDescription": "Counts all demand & prefetch data reads",
[all …]
H A Dcache.json55 "EventName": "L2_LINES_IN.ALL",
184 "BriefDescription": "All requests that miss L2 cache.",
191 "BriefDescription": "All L2 requests.",
432 …"PublicDescription": "Counts all retired load uops. This event accounts for SW prefetch uops of PR…
442 "PublicDescription": "Counts all retired store uops.",
501 …"PublicDescription": "This event counts the demand and prefetch data reads. All Core Data Reads in…
509 …sactions reached the super queue including requests initiated by the core, all L3 prefetches, page…
628 "BriefDescription": "Counts all demand & prefetch data reads have any response type.",
637 "BriefDescription": "Counts all demand & prefetch data reads",
646 "BriefDescription": "Counts all demand & prefetch data reads",
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a75/
H A Dpipeline.json21 "PublicDescription": "Duration for which all slots in the Load-Store Unit (LSU) are busy",
24 "BriefDescription": "Duration for which all slots in the Load-Store Unit (LSU) are busy"
27 …scription": "Duration for which all slots in the load-store issue queue are busy. This event count…
30 …scription": "Duration for which all slots in the load-store issue queue are busy. This event count…
33 …ription": "Duration for which all slots in the data processing issue queue are busy. This event co…
36 …ription": "Duration for which all slots in the data processing issue queue are busy. This event co…
39 …"PublicDescription": "Duration for which all slots in the data engine issue queue are busy. This e…
42 …"BriefDescription": "Duration for which all slots in the data engine issue queue are busy. This ev…
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_arith.c.inc263 TRANS(add_w, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_SIGN, tcg_gen_add_tl)
265 TRANS(sub_w, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_SIGN, tcg_gen_sub_tl)
267 TRANS(and, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_and_tl)
268 TRANS(or, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_or_tl)
269 TRANS(xor, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_xor_tl)
270 TRANS(nor, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_nor_tl)
271 TRANS(andn, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_andc_tl)
272 TRANS(orn, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_orc_tl)
273 TRANS(slt, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_slt)
274 TRANS(sltu, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sltu)
[all …]
/openbmc/linux/Documentation/userspace-api/ioctl/
H A Dioctl-number.rst45 convention at all.
77 0x02 all linux/fd.h
78 0x03 all linux/hdreg.h
80 0x06 all linux/lp.h
81 0x09 all linux/raid/md_u.h
85 0x12 all linux/fs.h
87 0x1b all InfiniBand Subsystem
89 0x20 all drivers/cdrom/cm206.h
90 0x22 all scsi/sg.h
105 '8' all SNP8023 advanced NIC card
[all …]
/openbmc/openbmc/poky/meta/recipes-connectivity/bluez5/bluez5/
H A Drun-ptest6 all=0
13 all=$((all + 1))
21 all=$((all + 1))
27 echo "All $all tests passed"
29 echo "$failed of $all tests failed"
/openbmc/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Dvirtual-memory.json3 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
6 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
11 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
14 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
19 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
22 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
/openbmc/openbmc/poky/meta/recipes-extended/pam/libpam/
H A Drun-ptest8 all=0
14 all=$((all + 1))
22 all=$((all + 1))
28 echo "All $all tests passed"
30 echo "$failed of $all tests failed"
/openbmc/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A Duncore-memory.json3 …every read (RdCAS) issued by the Memory Controller to DRAM (sum of all channels). All requests res…
11 … 64B read and write request entering the Memory Controller to DRAM (sum of all channels). Each wri…
19 …very write (WrCAS) issued by the Memory Controller to DRAM (sum of all channels). All requests res…
27 …every read (RdCAS) issued by the Memory Controller to DRAM (sum of all channels). All requests res…
35 … 64B read and write request entering the Memory Controller to DRAM (sum of all channels). Each wri…
43 …very write (WrCAS) issued by the Memory Controller to DRAM (sum of all channels). All requests res…
H A Duncore-interconnect.json3 "BriefDescription": "UNC_ARB_COH_TRK_REQUESTS.ALL",
5 "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL",
13 "EventName": "UNC_ARB_DAT_OCCUPANCY.ALL",
35 … "BriefDescription": "This event is deprecated. Refer to new event UNC_ARB_DAT_OCCUPANCY.ALL",
37 "EventName": "UNC_ARB_IFA_OCCUPANCY.ALL",
51 …"BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches [This ev…
59 …"BriefDescription": "Each cycle count number of all outgoing valid entries in ReqTrk. Such entry i…
61 "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL",
75 "BriefDescription": "UNC_ARB_TRK_REQUESTS.ALL",
77 "EventName": "UNC_ARB_TRK_REQUESTS.ALL",
[all …]
/openbmc/openbmc/poky/meta/recipes-support/nettle/nettle/
H A Drun-ptest6 all=0
21 all=$((all + 1))
29 all=$((all + 1))
37 echo "All $all tests passed"
39 echo "$failed of $all tests failed"
/openbmc/linux/Documentation/admin-guide/cgroup-v1/
H A Ddevices.rst11 'type' is a (all), c (char), or b (block). 'all' means it applies
12 to all types and all major and minor numbers. Major and minor are
13 either an integer or * for all. Access is a composition of r
16 The root device cgroup starts with rwm to 'all'. A child device
62 a cgroup's devices.deny file, all its children will have that entry removed
63 from their whitelist and all the locally set whitelist entries will be
85 A all "b 8:* rwm", "c 116:* rw"
86 B "c 1:3 rwm", "b 3:* rwm" all the rest
98 A "c 1:3 rwm", "c 1:5 r" all the rest
99 B "c 1:3 rwm", "c 1:5 r" all the rest
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen1/
H A Dcache.json75 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache reads (including har…
81 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache stores.",
87 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache shared reads.",
93 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Instruction cache reads.",
99 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache state change request…
105 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). PrefetchL2Cmd.",
111 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). L2 Prefetcher. All prefetches a…
134 "BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized.",
140 …"BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheab…
146 "BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Instruction cache read sized.",
[all …]
/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/templates/
H A Dbrtargets.html2 {% if buildrequest.brtarget_set.all.count > 1 %}
4 {% for target in buildrequest.brtarget_set.all %}
12 {% if buildrequest.brtarget_set.all.0.task %}
13 {{buildrequest.brtarget_set.all.0.target}}:{{buildrequest.brtarget_set.all.0.task}}
15 {{buildrequest.brtarget_set.all.0.target}}
17 {% if buildrequest.brtarget_set.all.count > 1 %}
18 (+ {{buildrequest.brtarget_set.all.count|add:"-1"}})

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