xref: /openbmc/u-boot/board/renesas/stout/cpld.h (revision e8f80a5a)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */
221871138SVladimir Barinov /*
321871138SVladimir Barinov  * Stout board CPLD definition
421871138SVladimir Barinov  *
521871138SVladimir Barinov  * Copyright (C) 2015 Renesas Electronics Europe GmbH
621871138SVladimir Barinov  * Copyright (C) 2015 Renesas Electronics Corporation
721871138SVladimir Barinov  * Copyright (C) 2015 Cogent Embedded, Inc.
821871138SVladimir Barinov  */
921871138SVladimir Barinov 
1021871138SVladimir Barinov #ifndef _CPLD_H_
1121871138SVladimir Barinov #define _CPLD_H_
1221871138SVladimir Barinov 
1321871138SVladimir Barinov /* power-up behaviour */
1421871138SVladimir Barinov #define MODE_MSK_FREE_RUN		0x00000001
1521871138SVladimir Barinov #define MODE_VAL_FREE_RUN		0x00000000
1621871138SVladimir Barinov #define MODE_MSK_STEP_UP		0x00000001
1721871138SVladimir Barinov #define MODE_VAL_STEP_UP		0x00000000
1821871138SVladimir Barinov 
1921871138SVladimir Barinov /* boot source */
2021871138SVladimir Barinov #define MODE_MSK_BOOT_SQPI_16KB_FAST	0x0000000E
2121871138SVladimir Barinov #define MODE_VAL_BOOT_SQPI_16KB_FAST	0x00000004
2221871138SVladimir Barinov #define MODE_MSK_BOOT_SQPI_16KB_SLOW	0x0000000E
2321871138SVladimir Barinov #define MODE_VAL_BOOT_SQPI_16KB_SLOW	0x00000008
2421871138SVladimir Barinov #define MODE_MSK_BOOT_SQPI_4KB_SLOW	0x0000000E
2521871138SVladimir Barinov #define MODE_VAL_BOOT_SQPI_4KB_SLOW	0x0000000C
2621871138SVladimir Barinov 
2721871138SVladimir Barinov /* booting CPU */
2821871138SVladimir Barinov #define MODE_MSK_BOOT_CA15		0x000000C0
2921871138SVladimir Barinov #define MODE_VAL_BOOT_CA15		0x00000000
3021871138SVladimir Barinov #define MODE_MSK_BOOT_CA7		0x000000C0
3121871138SVladimir Barinov #define MODE_VAL_BOOT_CA7		0x00000040
3221871138SVladimir Barinov #define MODE_MSK_BOOT_SH4		0x000000C0
3321871138SVladimir Barinov #define MODE_VAL_BOOT_SH4		0x000000C0
3421871138SVladimir Barinov 
3521871138SVladimir Barinov /* JTAG connection */
3621871138SVladimir Barinov #define MODE_MSK_JTAG_CORESIGHT		0xC0301C00
3721871138SVladimir Barinov #define MODE_VAL_JTAG_CORESIGHT		0x00200000
3821871138SVladimir Barinov #define MODE_MSK_JTAG_SH4		0xC0301C00
3921871138SVladimir Barinov #define MODE_VAL_JTAG_SH4		0x00300000
4021871138SVladimir Barinov 
4121871138SVladimir Barinov /* DDR3 (PLL) speed */
4221871138SVladimir Barinov #define MODE_MSK_DDR3_1600		0x00080000
4321871138SVladimir Barinov #define MODE_VAL_DDR3_1600		0x00000000
4421871138SVladimir Barinov #define MODE_MSK_DDR3_1333		0x00080000
4521871138SVladimir Barinov #define MODE_VAL_DDR3_1333		0x00080000
4621871138SVladimir Barinov 
4721871138SVladimir Barinov /* ComboPhy0 mode */
4821871138SVladimir Barinov #define MODE_MSK_PHY0_SATA0		0x01000000
4921871138SVladimir Barinov #define MODE_VAL_PHY0_SATA0		0x00000000
5021871138SVladimir Barinov #define MODE_MSK_PHY0_PCIE		0x01000000
5121871138SVladimir Barinov #define MODE_VAL_PHY0_PCIE		0x01000000
5221871138SVladimir Barinov 
5321871138SVladimir Barinov /* ComboPhy1 mode */
5421871138SVladimir Barinov #define MODE_MSK_PHY1_SATA1		0x00800000
5521871138SVladimir Barinov #define MODE_VAL_PHY1_SATA1		0x00000000
5621871138SVladimir Barinov #define MODE_MSK_PHY1_USB3		0x00800000
5721871138SVladimir Barinov #define MODE_VAL_PHY1_USB3		0x00800000
5821871138SVladimir Barinov 
5921871138SVladimir Barinov /*
6021871138SVladimir Barinov  * Illegal multiplexer combinations.
6121871138SVladimir Barinov  *    MUX                      Conflicts
6221871138SVladimir Barinov  *    name                  with any one of
6321871138SVladimir Barinov  * VIN0_BT656            VIN0_full, SD2
6421871138SVladimir Barinov  * VIN0_full             VIN0_BT656, SD2, AVB, VIN2_(all)
6521871138SVladimir Barinov  * VIN1_BT656            VIN1_(others), SD0
6621871138SVladimir Barinov  * VIN1_10bit            VIN1_(others), SD0, VIN3_with*, I2C1
6721871138SVladimir Barinov  * VIN1_12bit            VIN1_(others), SD0, VIN3_with*, I2C1, SCIFA0_(all)
6821871138SVladimir Barinov  * VIN2_BT656            VIN0_full, VIN2_(others), AVB,
6921871138SVladimir Barinov  * VIN2_withSYNC         VIN0_full, VIN2_(others), AVB, I2C1, SCIFA0_(all),
7021871138SVladimir Barinov  *                       VIN3_with*
7121871138SVladimir Barinov  * VIN2_withFIELD        VIN0_full, VIN2_(others), AVB, SQPI_(all)
7221871138SVladimir Barinov  * VIN2_withSYNCandFIELD VIN0_full, VIN2_(others), AVB, SQPI_(all), I2C1,
7321871138SVladimir Barinov  *                       SCIFA0_(all), VIN3_with*
7421871138SVladimir Barinov  * VIN3_BT656            VIN3_(others), IRQ3
7521871138SVladimir Barinov  * VIN3_withFIELD        VIN3_(others), IRQ3, VIN1_12bit, VIN2_withSYNC,
7621871138SVladimir Barinov  *                       VIN2_withSYNCandFIELD, VIN1_10bit
7721871138SVladimir Barinov  * VIN3_withSYNCandFIELD VIN3_(others), IRQ3, VIN1_12bit, VIN2_withSYNC,
7821871138SVladimir Barinov  *                       VIN2_withSYNCandFIELD, VIN1_10bit, I2C1
7921871138SVladimir Barinov  * AVB                   VIN0_full, VIN2_(all)
8021871138SVladimir Barinov  * QSPI_ONBOARD          VIN2_withFIELD, VIN2_withSYNCandFIELD, QSPI_COMEXPRESS
8121871138SVladimir Barinov  * QSPI_COMEXPRESS       VIN2_withFIELD, VIN2_withSYNCandFIELD, QSPI_ONBOARD
8221871138SVladimir Barinov  * I2C1                  VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
8321871138SVladimir Barinov  *                       VIN3_withSYNCandFIELD
8421871138SVladimir Barinov  * IRQ3                  VIN3_(all)
8521871138SVladimir Barinov  * SCIFA0_USB            VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
8621871138SVladimir Barinov  *                       SCIFA0_COMEXPRESS
8721871138SVladimir Barinov  * SCIFA0_COMEXPRESS     VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
8821871138SVladimir Barinov  *                       SCIFA0_USB
8921871138SVladimir Barinov  * SCIFA2                PWM210
9021871138SVladimir Barinov  * ETH_ONBOARD           ETH_COMEXPRESS
9121871138SVladimir Barinov  * ETH_COMEXPRESS        ETH_ONBOARD
9221871138SVladimir Barinov  * SD0                   VIN1_(all)
9321871138SVladimir Barinov  * SD2                   VIN0_(all)
9421871138SVladimir Barinov  * PWM210                SCIFA2
9521871138SVladimir Barinov  */
9621871138SVladimir Barinov 
9721871138SVladimir Barinov /* connected to COM Express connector and CN6 for camera, BT656 only */
9821871138SVladimir Barinov #define MUX_MSK_VIN0_BT656		0x00001001
9921871138SVladimir Barinov #define MUX_VAL_VIN0_BT656		0x00000000
10021871138SVladimir Barinov /* connected to COM Express connector and CN6 for camera, all modes */
10121871138SVladimir Barinov #define MUX_MSK_VIN0_full		0x00001007
10221871138SVladimir Barinov #define MUX_VAL_VIN0_full		0x00000002
10321871138SVladimir Barinov /* connected to COM Express connector, BT656 only */
10421871138SVladimir Barinov #define MUX_MSK_VIN1_BT656		0x00000801
10521871138SVladimir Barinov #define MUX_VAL_VIN1_BT656		0x00000800
10621871138SVladimir Barinov /* connected to COM Express connector, all 10-bit modes */
10721871138SVladimir Barinov #define MUX_MSK_VIN1_10bit		0x00000821
10821871138SVladimir Barinov #define MUX_VAL_VIN1_10bit		0x00000800
10921871138SVladimir Barinov /* connected to COM Express connector, all 12-bit modes */
11021871138SVladimir Barinov #define MUX_MSK_VIN1_12bit		0x000008A1
11121871138SVladimir Barinov #define MUX_VAL_VIN1_12bit		0x00000880
11221871138SVladimir Barinov /* connected to COM Express connector, BT656 only */
11321871138SVladimir Barinov #define MUX_MSK_VIN2_BT656		0x00000007
11421871138SVladimir Barinov #define MUX_VAL_VIN2_BT656		0x00000006
11521871138SVladimir Barinov /* connected to COM Express connector, modes with sync signals */
11621871138SVladimir Barinov #define MUX_MSK_VIN2_withSYNC		0x000000A7
11721871138SVladimir Barinov #define MUX_VAL_VIN2_withSYNC		0x00000086
11821871138SVladimir Barinov /* connected to COM Express connector, modes with field, clken signals */
11921871138SVladimir Barinov #define MUX_MSK_VIN2_withFIELD		0x0000000F
12021871138SVladimir Barinov #define MUX_VAL_VIN2_withFIELD		0x0000000E
12121871138SVladimir Barinov /* connected to COM Express connector, modes with sync, field, clken signals */
12221871138SVladimir Barinov #define MUX_MSK_VIN2_withSYNCandFIELD	0x000000AF
12321871138SVladimir Barinov #define MUX_VAL_VIN2_withSYNCandFIELD	0x0000008E
12421871138SVladimir Barinov /* connected to COM Express connector, BT656 only */
12521871138SVladimir Barinov #define MUX_MSK_VIN3_BT656		0x00000101
12621871138SVladimir Barinov #define MUX_VAL_VIN3_BT656		0x00000100
12721871138SVladimir Barinov /* connected to COM Express connector, modes with field, clken signals */
12821871138SVladimir Barinov #define MUX_MSK_VIN3_withFIELD		0x00000121
12921871138SVladimir Barinov #define MUX_VAL_VIN3_withFIELD		0x00000120
13021871138SVladimir Barinov /* connected to COM Express connector, modes with sync, field, clken signals */
13121871138SVladimir Barinov #define MUX_MSK_VIN3_withSYNCandFIELD	0x00000161
13221871138SVladimir Barinov #define MUX_VAL_VIN3_withSYNCandFIELD	0x00000120
13321871138SVladimir Barinov /* connected to COM Express connector (RGMII) */
13421871138SVladimir Barinov #define MUX_MSK_AVB			0x00000003
13521871138SVladimir Barinov #define MUX_VAL_AVB			0x00000000
13621871138SVladimir Barinov /* connected to on-board QSPI flash */
13721871138SVladimir Barinov #define MUX_MSK_QSPI_ONBOARD		0x00000019
13821871138SVladimir Barinov #define MUX_VAL_QSPI_ONBOARD		0x00000000
13921871138SVladimir Barinov /* connected to COM Express connector */
14021871138SVladimir Barinov #define MUX_MSK_QSPI_COMEXPRESS		0x00000019
14121871138SVladimir Barinov #define MUX_VAL_QSPI_COMEXPRESS		0x00000010
14221871138SVladimir Barinov /* connected to COM Express connector and PMIC */
14321871138SVladimir Barinov #define MUX_MSK_I2C1			0x00000061
14421871138SVladimir Barinov #define MUX_VAL_I2C1			0x00000060
14521871138SVladimir Barinov /* connected to HDMI driver */
14621871138SVladimir Barinov #define MUX_MSK_IRQ3			0x00000101
14721871138SVladimir Barinov #define MUX_VAL_IRQ3			0x00000000
14821871138SVladimir Barinov /* connected to USB/FTDI */
14921871138SVladimir Barinov #define MUX_MSK_SCIFA0_USB		0x00004081
15021871138SVladimir Barinov #define MUX_VAL_SCIFA0_USB		0x00004000
15121871138SVladimir Barinov /* connected to COM Express connector */
15221871138SVladimir Barinov #define MUX_MSK_SCIFA0_COMEXPRESS	0x00004081
15321871138SVladimir Barinov #define MUX_VAL_SCIFA0_COMEXPRESS	0x00000000
15421871138SVladimir Barinov /* connected to COM Express connector */
15521871138SVladimir Barinov #define MUX_MSK_SCIFA2			0x00002001
15621871138SVladimir Barinov #define MUX_VAL_SCIFA2			0x00000000
15721871138SVladimir Barinov /* connected to on-board 10/100 Phy */
15821871138SVladimir Barinov #define MUX_MSK_ETH_ONBOARD		0x00000600
15921871138SVladimir Barinov #define MUX_VAL_ETH_ONBOARD		0x00000000
16021871138SVladimir Barinov /* connected to COM Express connector (RMII) */
16121871138SVladimir Barinov #define MUX_MSK_ETH_COMEXPRESS		0x00000600
16221871138SVladimir Barinov #define MUX_VAL_ETH_COMEXPRESS		0x00000400
16321871138SVladimir Barinov /* connected to on-board MicroSD slot */
16421871138SVladimir Barinov #define MUX_MSK_SD0			0x00000801
16521871138SVladimir Barinov #define MUX_VAL_SD0			0x00000000
16621871138SVladimir Barinov /* connected to COM Express connector */
16721871138SVladimir Barinov #define MUX_MSK_SD2			0x00001001
16821871138SVladimir Barinov #define MUX_VAL_SD2			0x00001000
16921871138SVladimir Barinov /* connected to COM Express connector */
17021871138SVladimir Barinov #define MUX_MSK_PWM210			0x00002001
17121871138SVladimir Barinov #define MUX_VAL_PWM210			0x00002000
17221871138SVladimir Barinov 
17321871138SVladimir Barinov #define HDMI_MSK			0x07
17421871138SVladimir Barinov #define HDMI_OFF			0x00
17521871138SVladimir Barinov #define HDMI_ONBOARD			0x07
17621871138SVladimir Barinov #define HDMI_COMEXPRESS			0x05
17721871138SVladimir Barinov #define HDMI_ONBOARD_NODDC		0x03
17821871138SVladimir Barinov #define HDMI_COMEXPRESS_NODDC		0x01
17921871138SVladimir Barinov 
18021871138SVladimir Barinov void cpld_init(void);
18121871138SVladimir Barinov 
18221871138SVladimir Barinov #endif	/* _CPLD_H_ */
183