| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | fsl,mu-msi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
16 for one processor (A side) to signal the other processor (B side) using
20 different clocks (from each side of the different peripheral buses).
21 Therefore, the MU must synchronize the accesses from one side to the
23 registers (Processor A-side, Processor B-side).
28 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
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|
| /openbmc/linux/drivers/char/hw_random/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
12 To compile this driver as a module, choose M here: the
13 module will be called rng-core. This provides a device
28 This driver provides kernel-side support for a generic Random
29 Number Generator used by reading a 'dumb' iomem address that
30 is to be read no faster than, for example, once a second;
31 the default FPGA bitstream on the TS-7800 has such functionality.
33 To compile this driver as a module, choose M here: the
34 module will be called timeriomem-rng.
43 This driver provides kernel-side support for the Random Number
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|
| /openbmc/linux/Documentation/locking/ |
| H A D | seqlock.rst | 8 Sequence counters are a reader-writer consistency mechanism with
9 lockless readers (read-only retry loops), and no writer starvation. They
11 reader wants a consistent set of information and is willing to retry if
14 A data set is consistent when the sequence count at the beginning of the
15 read side critical section is even and the same sequence count value is
17 be copied out inside the read side critical section. If the sequence
24 the end of the write side critical section the sequence count becomes
27 A sequence counter write side critical section must never be preempted
28 or interrupted by read side sections. Otherwise the reader will spin for
30 interrupted writer. If that reader belongs to a real-time scheduling
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|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/silvermont/ |
| H A D | virtual-memory.json | 12 "BriefDescription": "Total cycles for all the page walks. (I-side and D-side)",
15 … cycle when a data (D) page walk or instruction (I) page walk is in progress. Since a pagewalk im…
20 "BriefDescription": "Duration of D-side page-walks in core cycles",
23 … when a D-side (walks due to a load) page walk is in progress. Page walk duration divided by numbe…
28 "BriefDescription": "D-side page-walks",
32 …cDescription": "This event counts when a data (D) page walk is completed or started. Since a page…
37 "BriefDescription": "Duration of I-side page-walks in core cycles",
40 …a I-side (walks due to an instruction fetch) page walk is in progress. Page walk duration divided …
45 "BriefDescription": "I-side page-walks",
49 …when an instruction (I) page walk is completed or started. Since a page walk implies a TLB miss, …
[all …]
|
| /openbmc/qemu/docs/devel/ |
| H A D | rcu.rst | 1 Using RCU (Read-Copy-Update) for synchronization
4 Read-copy update (RCU) is a synchronization mechanism that is used to
5 protect read-mostly data structures. RCU is very efficient and scalable
6 on the read side (it is wait-free), and thus can make the read paths
9 RCU supports concurrency between a single writer and multiple readers,
10 thus it is not used alone. Typically, the write-side will use a lock to
12 restricting updates to a single task). In QEMU, when a lock is used,
14 lock" (BQL). Also, restricting updates to a single task is done in
17 RCU is fundamentally a "wait-to-finish" mechanism. The read side marks
18 sections of code with "critical sections", and the update side will wait
[all …]
|
| /openbmc/linux/Documentation/usb/ |
| H A D | gadget_serial.rst | 7 (updated 8-May-2008 for v2.3)
11 ----------------------
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 You should have received a copy of the GNU General Public
25 MA 02111-1307 USA.
35 -------------
38 version 2.3 or later of the gadget serial driver in a 2.6
55 --------
56 The gadget serial driver is a Linux USB gadget driver, a USB device
57 side driver. It runs on a Linux system that has USB device side
[all …]
|
| /openbmc/linux/Documentation/RCU/ |
| H A D | checklist.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 This document contains a checklist for producing and reviewing patches
10 result in the same sorts of problems that leaving out a locking primitive
12 over a rather long period of time, but improvements are always welcome!
14 0. Is RCU being applied to a read-mostly situation? If the data
18 tool for the job. Yes, RCU does reduce read-side overhead by
19 increasing write-side overhead, which is exactly why normal uses
23 provides a simpler implementation. An example of this situation
27 Yet another exception is where the low real-time latency of RCU's
28 read-side primitives is critically important.
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|
| H A D | whatisRCU.rst | 3 What is RCU? -- "Read, Copy, Update"
21 …ries: Fundamentals https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries
22 …Cases https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries-additional-use-cases
27 RCU is a synchronization mechanism that was added to the Linux kernel
28 during the 2.5 development effort that is optimized for read-mostly
47 :ref:`6. ANALOGY WITH READER-WRITER LOCKING <6_whatisRCU>`
55 People who prefer starting with a conceptual overview should focus on
67 everything, feel free to read the whole thing -- but if you are really
69 never need this document anyway. ;-)
74 ----------------
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|
| H A D | lockdep.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 aware of when each task enters and leaves any flavor of RCU read-side
18 rcu_read_lock_bh_held() for RCU-bh.
19 rcu_read_lock_sched_held() for RCU-sched.
20 rcu_read_lock_any_held() for any of normal RCU, RCU-bh, and RCU-sched.
29 In addition, a separate kernel config parameter CONFIG_PROVE_RCU enables
33 Check for RCU read-side critical section.
35 Check for RCU-bh read-side critical section.
37 Check for RCU-sched read-side critical section.
39 Check for SRCU read-side critical section.
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|
| /openbmc/linux/include/linux/ |
| H A D | srcu.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Sleepable Read-Copy Update mechanism for mutual exclusion
11 * For detailed explanation of Read-Copy Update mechanism see -
83 * srcu_read_lock_held - might we be in SRCU read-side critical section?
87 * read-side critical section. In absence of CONFIG_DEBUG_LOCK_ALLOC,
88 * this assumes we are in an SRCU read-side critical section unless it can
102 return lock_is_held(&ssp->dep_map); in srcu_read_lock_held()
109 * srcu_lock_sync(), which is basically an empty *write*-side critical section,
113 /* Annotates a srcu_read_lock() */
119 /* Annotates a srcu_read_lock() */
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|
| H A D | seqlock.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * seqcount_t / seqlock_t - a reader-writer consistency mechanism with
7 * lockless readers (read-only retry loops), and no writer starvation.
12 * - Based on x86_64 vsyscall gettimeofday: Keith Owens, Andrea Arcangeli
13 * - Sequence counters with associated locks, (C) 2020 Linutronix GmbH
17 #include <linux/kcsan-checks.h>
26 * The seqlock seqcount_t interface does not prescribe a precise sequence of
27 * read begin/retry/end. For readers, typically there is a call to
31 * As a consequence, we take the following best-effort approach for raw usage
32 * via seqcount_t under KCSAN: upon beginning a seq-reader critical section,
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|
| /openbmc/linux/drivers/char/ipmi/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate 'IPMI top-level message handler'
14 IPMI is a standard for managing sensors (temperature,
15 voltage, etc.) in a system.
17 See <file:Documentation/driver-api/ipmi.rst> for more details on the driver.
31 bool 'Generate a panic event to all BMCs on a panic'
33 When a panic occurs, this will cause the IPMI message handler to,
44 When a panic occurs, this will cause the IPMI message handler to,
46 address of the panic generator (byte 4 of the event), a sequence
66 Provides a driver for System Interfaces (KCS, SMIC, BT).
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|
| /openbmc/linux/Documentation/RCU/Design/Requirements/ |
| H A D | Requirements.rst | 2 A Tour Through RCU's Requirements
16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
32 has this learning process been a lot of fun, but it has also been a
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/powerpc/power9/ |
| H A D | translation.json | 15 …che was reloaded with Shared (S) data from another core's L2 on the same chip due to a demand load"
20 "BriefDescription": "Double-Precion or Quad-Precision instruction completed"
25 …escription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same No…
35 …A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on th…
45 …"BriefDescription": "Finish stall due to a vector fixed point instruction in the execution pipelin…
50 "BriefDescription": "LSU Finished a PPC instruction (up to 4 per cycle)"
60 …A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a …
65 …"BriefDescription": "Completion stall due to a long latency vector fixed point instruction (divisi…
70 …on": "The processor's data cache was reloaded from a location other than the local core's L2 due t…
75 …n": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's…
[all …]
|
| H A D | pipeline.json | 10 "BriefDescription": "Number of I-ERAT reloads"
15 …te that this count is per slice, so if a load spans multiple slices this event will increment mult…
25 …"BriefDescription": "Finish stall because the NTF instruction was a multi-cycle instruction issued…
30 …ded either shared or modified data from another core's L2/L3 on the same chip due to a marked load"
35 …ription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node o…
40 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without confl…
80 …ription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L…
90 …r's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a…
95 …escription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core'…
100 …rbitration onto the issue pipe to another instruction (from the same thread or a different thread)"
[all …]
|
| H A D | marked.json | 5 …"BriefDescription": "Number of cycles the marked instruction is experiencing a stall while it is n…
10 …"BriefDescription": "A Page Directory Entry was reloaded to a level 1 page walk cache from beyond …
20 …Description": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's…
25 …e was reloaded from another chip's memory on the same Node or Group ( Remote) due to a demand load"
45 …"BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's …
50 …"BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's …
60 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
70 …iption": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO …
85 …he processor's Instruction cache was reloaded from a location other than the local core's L3 due t…
95 …ption": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO…
[all …]
|
| H A D | other.json | 30 "BriefDescription": "IERAT reloaded (after a miss) for 4K pages"
45 …on": "The processor's data cache was reloaded from a location other than the local core's L3 due t…
50 …cription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's …
55 …"BriefDescription": "A Conditional Branch that resolved to taken was mispredicted as not taken (du…
60 …"BriefDescription": "A demand load referenced a line in an active fuzzy prefetch stream. The strea…
65 "BriefDescription": "Read-write data cache collisions"
80 …"BriefDescription": "Cycles in which no new instructions can be dispatched to the ICT after a flus…
85 …"BriefDescription": "A radix translation attempt missed in the TLB and all levels of page walk cac…
90 "BriefDescription": "D-cache invalidates sent over the reload bus to the core"
120 …"BriefDescription": "L3 TM CAM is full when a L2 castout of TM_SC line occurs. Line is pushed to …
[all …]
|
| /openbmc/u-boot/doc/ |
| H A D | README.i2c | 4 While I2C supports multi-master buses this is difficult to get right.
5 The implementation on the master side in software is quite complex.
6 Clock-stretching and the arbitrary time that an I2C transaction can take
8 When one or more masters can be reset independently part-way through a
11 U-Boot provides a scheme based on two 'claim' GPIOs, one driven by the
13 (Embedded Controller, a small CPU aimed at handling system tasks). With
16 reboots by either side without difficulty.
18 Since U-Boot runs on the AP, the terminology used is 'our' claim GPIO,
23 i2c-arb-gpio-challenge for the implementation.
26 each have a 'bus claim' line, which is an output that the other can see.
[all …]
|
| /openbmc/linux/drivers/block/rnbd/ |
| H A D | README | 6 ------------
8 RNBD (RDMA Network Block Device) is a pair of kernel modules
9 (client and server) that allow for remote access of a block device on
12 on the client side as local block devices.
19 ------------
24 -----------
26 Server side:
29 Client side:
32 /sys/devices/virtual/rnbd-client/ctl/map_device
34 Where "sessname=" is a session name, a string to identify the session
[all …]
|
| /openbmc/openbmc-test-automation/pldm/ |
| H A D | test_firmware_boot_side.robot | 3 Documentation Test firmware boot side switch using pldmtool.
7 # 2. Check the firmware boot side ( login to BMC and execute )
9 # pldmtool bios GetBIOSAttributeCurrentValueByHandle -a fw_boot_side
12 # 3. Set the firmware boot side to Temp or Perm accordingly
14 # pldmtool bios SetBIOSAttributeCurrentValue -a fw_boot_side -d Temp
19 # 7. Verify the boot side is still same which was set.
33 # By default 2, to ensure, it performs both Perm and Temp side switch and boot.
36 # This dictionary is for Temp -> Perm or vice versa in the test code.
41 Test Firmware Boot Side Using Pldmtool
42 [Documentation] Power off the host , set the firmware boot side via pldmtool,
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/powerpc/power8/ |
| H A D | frontend.json | 5 …"BriefDescription": "Branch instruction completed with a target address less than current instruct…
41 "BriefDescription": "Cycles when a demand ifetch was pending",
47 "BriefDescription": "Number of I-ERAT reloads",
53 "BriefDescription": "IERAT Reloaded (Miss) for a 16M page",
60 "PublicDescription": "IERAT Reloaded (Miss) for a 4k page"
65 "BriefDescription": "IERAT Reloaded (Miss) for a 64k page",
89 …n cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Gr…
90 …n cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Gr…
95 …ion cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Gr…
96 …ion cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Gr…
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/ |
| H A D | uncore-cache.json | 13 …a user to capture occupancy related information by filtering the Cb0 occupancy count captured in C…
21 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa…
30 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa…
39 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa…
48 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa…
57 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa…
66 …"PublicDescription": "Counts the number of lines that were victimized on a fill. This can be filt…
75 …"PublicDescription": "Counts the number of lines that were victimized on a fill. This can be filt…
84 …"PublicDescription": "Counts the number of lines that were victimized on a fill. This can be filt…
93 …"PublicDescription": "Counts the number of lines that were victimized on a fill. This can be filt…
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/knightslanding/ |
| H A D | virtual-memory.json | 3 "BriefDescription": "Counts the number of load micro-ops retired that cause a DTLB miss",
15 …"PublicDescription": "This event counts every cycle when a data (D) page walk or instruction (I) p…
20 …"BriefDescription": "Counts the total number of core cycles for all the D-side page walks. The cyc…
27 …"BriefDescription": "Counts the total D-side page walks that are completed or started. The page wa…
35 …"BriefDescription": "Counts the total number of core cycles for all the I-side page walks. The cyc…
38 …"PublicDescription": "This event counts every cycle when an I-side (walks due to an instruction fe…
43 "BriefDescription": "Counts the total I-side page walks that are completed.",
51 "BriefDescription": "Counts the total page walks that are completed (I-side and D-side)",
|
| /openbmc/pldm/oem/ibm/libpldmresponder/ |
| H A D | inband_code_update.hpp | 27 * notification to phosphor-software-manager app
33 * @param[in] dBusIntf - D-Bus handler pointer
44 /* @brief Method to return the current boot side
48 /* @brief Method to return the next boot side
52 /* @brief Method to set the current boot side or
53 * perform a rename operation on current boot side
54 * @param[in] currSide - current side to be set to
59 /* @brief Method to set the next boot side
60 * @param[in] nextSide - next boot side to be set to
65 /* @brief Method to set the running and non-running
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | uncore-interconnect.json | 46 …CIITOM request issued by the IRP unit to the mesh with the intention of writing a full cacheline.",
50 …t to the mesh with the intention of writing a full cacheline to coherent memory, without a RFO. P…
55 …RFO request issued by the IRP unit to the mesh with the intention of writing a partial cacheline.",
59 … IRP unit to the mesh with the intention of writing a partial cacheline to coherent memory. RFO i…
84 …ory, received by the IRP and inserted into the Fire and Forget queue (FAF), a queue used for proce…
92 …"PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) queue, a queue used for processin…
96 "BriefDescription": "FAF allocation -- sent to ADQ",
127 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
135 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
143 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
[all …]
|