155d42d27SAndi Kleen[
255d42d27SAndi Kleen    {
355d42d27SAndi Kleen        "BriefDescription": "Counts the number of load micro-ops retired that cause a DTLB miss",
4*ff3d02b2SIan Rogers        "Data_LA": "1",
5*ff3d02b2SIan Rogers        "EventCode": "0x04",
6*ff3d02b2SIan Rogers        "EventName": "MEM_UOPS_RETIRED.DTLB_MISS_LOADS",
7*ff3d02b2SIan Rogers        "PEBS": "1",
8*ff3d02b2SIan Rogers        "SampleAfterValue": "200003",
9*ff3d02b2SIan Rogers        "UMask": "0x8"
1055d42d27SAndi Kleen    },
1155d42d27SAndi Kleen    {
12*ff3d02b2SIan Rogers        "BriefDescription": "Counts the total number of core cycles for all the page walks. The cycles for page walks started in speculative path will also be included.",
13*ff3d02b2SIan Rogers        "EventCode": "0x05",
14*ff3d02b2SIan Rogers        "EventName": "PAGE_WALKS.CYCLES",
15*ff3d02b2SIan Rogers        "PublicDescription": "This event counts every cycle when a data (D) page walk or instruction (I) page walk is in progress.",
16*ff3d02b2SIan Rogers        "SampleAfterValue": "200003",
17*ff3d02b2SIan Rogers        "UMask": "0x3"
1855d42d27SAndi Kleen    },
1955d42d27SAndi Kleen    {
20*ff3d02b2SIan Rogers        "BriefDescription": "Counts the total number of core cycles for all the D-side page walks. The cycles for page walks started in speculative path will also be included.",
21*ff3d02b2SIan Rogers        "EventCode": "0x05",
2255d42d27SAndi Kleen        "EventName": "PAGE_WALKS.D_SIDE_CYCLES",
2355d42d27SAndi Kleen        "SampleAfterValue": "200003",
24*ff3d02b2SIan Rogers        "UMask": "0x1"
2555d42d27SAndi Kleen    },
2655d42d27SAndi Kleen    {
27*ff3d02b2SIan Rogers        "BriefDescription": "Counts the total D-side page walks that are completed or started. The page walks started in the speculative path will also be counted",
28*ff3d02b2SIan Rogers        "EdgeDetect": "1",
29*ff3d02b2SIan Rogers        "EventCode": "0x05",
30*ff3d02b2SIan Rogers        "EventName": "PAGE_WALKS.D_SIDE_WALKS",
31*ff3d02b2SIan Rogers        "SampleAfterValue": "100003",
32*ff3d02b2SIan Rogers        "UMask": "0x1"
33*ff3d02b2SIan Rogers    },
34*ff3d02b2SIan Rogers    {
35*ff3d02b2SIan Rogers        "BriefDescription": "Counts the total number of core cycles for all the I-side page walks. The cycles for page walks started in speculative path will also be included.",
36*ff3d02b2SIan Rogers        "EventCode": "0x05",
37*ff3d02b2SIan Rogers        "EventName": "PAGE_WALKS.I_SIDE_CYCLES",
38*ff3d02b2SIan Rogers        "PublicDescription": "This event counts every cycle when an I-side (walks due to an instruction fetch) page walk is in progress.",
39*ff3d02b2SIan Rogers        "SampleAfterValue": "200003",
40*ff3d02b2SIan Rogers        "UMask": "0x2"
41*ff3d02b2SIan Rogers    },
42*ff3d02b2SIan Rogers    {
43*ff3d02b2SIan Rogers        "BriefDescription": "Counts the total I-side page walks that are completed.",
44*ff3d02b2SIan Rogers        "EdgeDetect": "1",
45*ff3d02b2SIan Rogers        "EventCode": "0x05",
4655d42d27SAndi Kleen        "EventName": "PAGE_WALKS.I_SIDE_WALKS",
4755d42d27SAndi Kleen        "SampleAfterValue": "100003",
48*ff3d02b2SIan Rogers        "UMask": "0x2"
4955d42d27SAndi Kleen    },
5055d42d27SAndi Kleen    {
51*ff3d02b2SIan Rogers        "BriefDescription": "Counts the total page walks that are completed (I-side and D-side)",
52*ff3d02b2SIan Rogers        "EdgeDetect": "1",
5355d42d27SAndi Kleen        "EventCode": "0x05",
5455d42d27SAndi Kleen        "EventName": "PAGE_WALKS.WALKS",
5555d42d27SAndi Kleen        "SampleAfterValue": "100003",
56*ff3d02b2SIan Rogers        "UMask": "0x3"
5755d42d27SAndi Kleen    }
5855d42d27SAndi Kleen]
59