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/openbmc/u-boot/arch/arm/mach-uniphier/boot-device/
H A Dboot-device-pxs2.c15 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
24 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
[all …]
H A Dboot-device-ld11.c15 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
24 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"},
[all …]
H A Dboot-device-ld4.c16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize 1MB, Addr 5)"},
25 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
26 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
[all …]
H A Dboot-device-pro5.c15 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
16 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
27 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512MB, Addr 5)"},
28 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
29 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
[all …]
H A Dboot-device-pxs3.c16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
26 {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"},
27 {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"},
[all …]
/openbmc/u-boot/board/freescale/t208xrdb/
H A DREADME13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
18 - 8 Ethernet interfaces, supporting combinations of the following:
40 1G Ethernet numbers: 8 6
42 SerDes lanes: 16 8
70 - NAND: 1GB 8-bit NAND flash
89 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
90 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
92 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
93 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
94 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
[all …]
/openbmc/linux/tools/testing/selftests/tc-testing/tc-tests/actions/
H A Dpolice.json20 "matchPattern": "action order [0-9]*: police 0x1 rate 1Kbit burst 10Kb",
42 "cmdUnderTest": "$TC actions add action police rate 8kbit burst 24k index 9",
69 "matchPattern": "action order [0-9]*: police 0x62 rate 90Kbit burst 10Kb mtu 1Kb",
90 …"cmdUnderTest": "$TC actions add action police rate 90kbit burst 10k mtu 2kb peakrate 100kbit inde…
93 …"matchPattern": "action order [0-9]*: police 0x3 rate 90Kbit burst 10Kb mtu 2Kb peakrate 100Kbit",
114 … "cmdUnderTest": "$TC actions add action police rate 5kbit burst 6kb peakrate 10kbit index 9",
117 "matchPattern": "action order [0-9]*: police 0x9 rate 5Kb burst 10Kb",
141 …"matchPattern": "action order [0-9]*: police 0x40 rate 1Mbit burst 100Kb mtu 2Kb action reclassif…
162 … "cmdUnderTest": "$TC actions add action police rate 2mbit burst 200k linklayer ethernet index 8",
165 …"matchPattern": "action order [0-9]*: police 0x8 rate 2Mbit burst 200Kb mtu 2Kb action reclassify…
[all …]
/openbmc/u-boot/board/freescale/t104xrdb/
H A DREADME9 personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch).
45 - Four e5500 cores, each with a private 256 KB L2 cache
46 - 256 KB shared L3 CoreNet platform cache (CPC)
60 - Integrated 8-port Gigabit Ethernet switch (T1040 only)
80 - Two 8-channel DMA engines
90 T1042 is a reduced personality of T1040 without Integrated 8-port Gigabit
96 - SERDES Connections, 8 lanes information:
104 8: SATA connector
109 - NAND flash: 1GB 8-bit NAND flash
131 - SERDES Connections, 8 lanes information:
[all …]
/openbmc/linux/drivers/base/
H A Dnode.c386 "Node %d MemTotal: %8lu kB\n" in node_read_meminfo()
387 "Node %d MemFree: %8lu kB\n" in node_read_meminfo()
388 "Node %d MemUsed: %8lu kB\n" in node_read_meminfo()
389 "Node %d SwapCached: %8lu kB\n" in node_read_meminfo()
390 "Node %d Active: %8lu kB\n" in node_read_meminfo()
391 "Node %d Inactive: %8lu kB\n" in node_read_meminfo()
392 "Node %d Active(anon): %8lu kB\n" in node_read_meminfo()
393 "Node %d Inactive(anon): %8lu kB\n" in node_read_meminfo()
394 "Node %d Active(file): %8lu kB\n" in node_read_meminfo()
395 "Node %d Inactive(file): %8lu kB\n" in node_read_meminfo()
[all …]
/openbmc/u-boot/board/freescale/t1040qds/
H A DREADME14 - Four e5500 cores, each with a private 256 KB L2 cache
15 - 256 KB shared L3 CoreNet platform cache (CPC)
29 - Integrated 8-port Gigabit Ethernet switch (T1040 only)
49 - Two 8-channel DMA engines
55 - SERDES Connections, 8 lanes supporting:
65 - NAND flash: 8-bit, async, up to 2GB.
66 - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
85 - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
99 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
100 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
[all …]
/openbmc/u-boot/board/freescale/t102xrdb/
H A DREADME14 - two e5500 cores, each with a private 256 KB L2 cache
19 - 256 KB shared L3 CoreNet platform cache (CPC)
53 - Two 8-channel DMA engines
88 - NAND: 1GB 8-bit NAND flash
129 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
130 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
132 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
133 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
134 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
148 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
[all …]
/openbmc/u-boot/board/freescale/t102xqds/
H A DREADME14 - two e5500 cores, each with a private 256 KB L2 cache
19 - 256 KB shared L3 CoreNet platform cache (CPC)
53 - Two 8-channel DMA engines
92 - NAND Flash: 8-bit, async, up to 2GB
93 - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
94 - NOR devices support 8 virtual banks
142 - Support for SD slots for: SD, SDHC (1x, 4x, 8x) and MMC.
155 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
156 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
158 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
[all …]
/openbmc/u-boot/board/freescale/t208xqds/
H A DREADME13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
18 - 8 Ethernet interfaces, supporting combinations of the following:
40 1G Ethernet numbers: 8 6
42 SerDes lanes: 16 8
69 - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
124 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
125 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
127 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
128 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
129 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
[all …]
/openbmc/u-boot/board/qualcomm/dragonboard820c/
H A Dreadme.txt54 8) Boot the uboot image using fastboot
119 8) reboot the db820 board
203 S - Flash Throughput, 94000 KB/s (2959024 Bytes, 31250 us)
224 [150] <8>keymaster: "\"KEYMASTER Init \""
303 [ 0.000000] adsp@8ea00000 (0x000000008ea00000--0x0000000090400000) overlaps with gpu@8f200000 (0…
305 [ 0.000000] OF: reserved mem: initialized node gpu@8f200000, compatible id shared-dma-pool
306 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000090400000, size 8 MiB
343 [ 0.000000] .text : 0xffff000008080000 - 0xffff000008b70000 ( 11200 KB)
344 [ 0.000000] .rodata : 0xffff000008b70000 - 0xffff000009080000 ( 5184 KB)
345 [ 0.000000] .init : 0xffff000009080000 - 0xffff000009190000 ( 1088 KB)
[all …]
/openbmc/u-boot/doc/
H A DREADME.N12139 - 8-stage pipeline.
22 - 4/8-entry fully associative iTLB/dTLB.
27 - 4KB & 1MB.
28 - 8KB & 1MB.
33 - Cache size: 8KB/16KB/32KB/64KB.
38 - Size: 4KB to 1MB.
H A DREADME.b4860qds40 . RapidIO manager (RMAN) - Support SRIO types 8, 9, 10, and 11 (inbound and
52 - Each supports up to 4 lanes and a total of up to 8 lanes
53 . Up to 8-lanes Common Public Radio Interface (CPRI) controller for glue-less
71 - SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point 8x8 switch VSC3308
80 - QIXIS 8-bit NOR Flash Emulator
81 - 8-bit NAND Flash
90 - 2 KB internal memory space including
93 - Two 8T49N222A SerDes ref clock devices support two SerDes port clock frequency - total four
173 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4 KB
175 0xF_FF80_0000 0xF_FF80_FFFF IFC NAND Flash 64 KB
[all …]
/openbmc/u-boot/board/freescale/t4qds/
H A DREADME10 32 lanes grouped into four 8-lane banks
36 NAND flash: 8-bit, async or sync, up to 2GB.
38 NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
43 - Flexible demux allows 8 or 16 bit evaluation.
111 0x0_f800_0000 (0xf_f800_0000) - 0x0_f803_ffff 256KB PCIE IO
114 0x0_ffdf_0000 (0xf_ffdf_0000) - 0x0_ffdf_03ff 4KB QIXIS
115 0x0_ffff_f000 (0x0_7fff_fff0) - 0x0_ffff_ffff 4KB Boot page translation for secondary cores
147 and copy U-Boot(768 KB) from NAND/SD device to DDR.
158 |SecureBoot header | 0xFFFC0000 (32KB) |
160 |GD, BD | 0xFFFC8000 (4KB) |
[all …]
/openbmc/u-boot/include/configs/
H A Dxtfpga.h61 /* Lx60 can only map 128kb memory (instead of 256kb) when running under OCD */
63 # define CONFIG_SYS_MONITOR_LEN 0x00020000 /* 128KB */
65 # define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256KB */
68 #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* heap 256KB */
140 #define FPGAREG_MTH_WIDTH 8
143 #define FPGAREG_DAY_WIDTH 8
156 * Bit 7 maps the first 128KB of ROM address space at CONFIG_SYS_ROM_BASE to
201 # define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */
202 # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x2000 /* param size 8KB */
207 # define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
[all …]
/openbmc/linux/arch/sh/mm/
H A DKconfig23 default "8" if PAGE_SIZE_16KB
35 The page size is not necessarily 4KB. Keep this in mind when
155 bool "4kB"
160 bool "8kB"
163 This enables 8kB pages as supported by SH-X2 and later MMUs.
166 bool "16kB"
169 This enables 16kB pages on MMU-less SH systems.
172 bool "64kB"
175 This enables support for 64kB pages, possible on all SH-4
187 bool "64kB"
[all …]
/openbmc/linux/arch/powerpc/include/asm/book3s/64/
H A Dradix-4k.h8 #define RADIX_PTE_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 4K = 2MB
9 #define RADIX_PMD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 2MB = 1GB
10 #define RADIX_PUD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 1GB = 512GB
11 #define RADIX_PGD_INDEX_SIZE 13 // size: 8B << 13 = 64KB, maps 2^13 x 512GB = 4PB
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac1000.h79 #define GMAC_ADDR_HIGH(reg) ((reg > 15) ? 0x00000800 + (reg - 16) * 8 : \
80 0x00000040 + (reg * 8))
81 #define GMAC_ADDR_LOW(reg) ((reg > 15) ? 0x00000804 + (reg - 16) * 8 : \
82 0x00000044 + (reg * 8))
177 #define GMAC_DEBUG_RXFSTS_MASK GENMASK(9, 8) /* MTL Rx FIFO Fill-level */
178 #define GMAC_DEBUG_RXFSTS_SHIFT 8
203 #define DMA_BUS_MODE_PBL_SHIFT 8
278 * 0,00 - Full minus 1KB (only valid when rxfifo >= 4KB and EFC enabled)
279 * 0,01 - Full minus 2KB (only valid when rxfifo >= 4KB and EFC enabled)
280 * 0,10 - Full minus 3KB (only valid when rxfifo >= 4KB and EFC enabled)
[all …]
/openbmc/linux/arch/x86/pci/
H A Dce4100.c45 #define KB (1024) macro
106 DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
107 DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
108 DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
109 DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write)
110 DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write)
111 DEFINE_REG(6, 1, 0x10, (512*KB), reg_init, reg_read, reg_write)
112 DEFINE_REG(6, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
113 DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write)
114 DEFINE_REG(8, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
[all …]
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dvvfat54 # Add 2 large files, above the cluster size (8KB)
56 # write 'A' * 1KB, 'B' * 1KB, 'C' * 1KB, ...
57 for i in range(8 * 2): # two clusters
61 # write 'A' * 1KB, 'B' * 1KB, 'C' * 1KB, ...
62 for i in range(8 * 3): # 3 clusters
354 # The content of LARGE1 is A * 1KB, B * 1KB, C * 1KB, ..., P * 1KB
355 # Lets change it to be Z * 1KB, Y * 1KB, X * 1KB, ..., K * 1KB
388 new_content = b"X" * 8 * 1024 + b"Y" * 8 * 1024
406 b"W" * 8 * 1024 +
407 b"X" * 8 * 1024 +
[all …]
/openbmc/linux/fs/proc/
H A Dmeminfo.c30 seq_put_decimal_ull_width(m, s, num << (PAGE_SHIFT - 10), 8); in show_val_kb()
31 seq_write(m, " kB\n", 4); in show_val_kb()
92 seq_printf(m, "Zswap: %8lu kB\n", in meminfo_proc_show()
94 seq_printf(m, "Zswapped: %8lu kB\n", in meminfo_proc_show()
112 seq_printf(m, "KernelStack: %8lu kB\n", in meminfo_proc_show()
115 seq_printf(m, "ShadowCallStack:%8lu kB\n", in meminfo_proc_show()
130 seq_printf(m, "VmallocTotal: %8lu kB\n", in meminfo_proc_show()
139 seq_printf(m, "HardwareCorrupted: %5lu kB\n", in meminfo_proc_show()
/openbmc/linux/drivers/s390/crypto/
H A Dzcrypt_ccamisc.c310 char key_form[8]; in cca_genseckey()
311 char key_length[8]; in cca_genseckey()
312 char key_type1[8]; in cca_genseckey()
313 char key_type2[8]; in cca_genseckey()
352 memcpy(preqparm->lv1.key_form, "OP ", 8); in cca_genseckey()
357 memcpy(preqparm->lv1.key_length, "KEYLN16 ", 8); in cca_genseckey()
362 memcpy(preqparm->lv1.key_length, "KEYLN24 ", 8); in cca_genseckey()
367 memcpy(preqparm->lv1.key_length, "KEYLN32 ", 8); in cca_genseckey()
375 memcpy(preqparm->lv1.key_type1, "AESDATA ", 8); in cca_genseckey()
422 prepparm->lv3.keyblock.tok, 8 * keysize); in cca_genseckey()
[all …]

12345678910>>...42