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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,ipq5332-usb-hsphy.yaml47 usb-phy@7b000 {
/openbmc/qemu/include/hw/net/
H A Dnpcm_gmac.h66 #define RX_DESC_RDES0_IPC_CHKSM_ERR_GNT_FRM_MASK BIT(7)
128 #define TX_DESC_TDES0_VLAN_FRM_MASK BIT(7)
182 (0b000)
197 (0b000)
221 #define NPCM_DMA_STATUS_RU BIT(7)
268 #define NPCM_DMA_INTR_ENAB_RUE BIT(7)
/openbmc/qemu/target/riscv/
H A Dinternals.h26 * - U 0b000
68 FIELD(VDATA, NF, 7, 4)
69 FIELD(VDATA, WD, 7, 1)
86 RISCV_FRM_DYN = 7, /* Dynamic rounding mode */
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dpmk8350.dtsi88 bits = <1 7>;
92 pmk8350_gpios: gpio@b000 {
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dversatile-pb.dts58 interrupt-map-mask = <0x1800 0 0 7>;
104 mmc@b000 {
/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_hdmi.h15 * Bit 7 RW Reserved. Default 1, sw_reset_emp starting from G12A
39 * Bit 7 RW hdcp22_skpclk_en: starting from G12A, 1=enable; 0=disable
61 * [ 7] rxsense_fall starting from G12A
76 * Bit 7 RW rxsense_fall starting from G12A
86 * [7] rxsense_fall starting from G12A
101 #define HDMITX_TOP_INTR_RXSENSE_FALL BIT(7)
104 * Bit 14:12 RW tmds_sel: 3'b000=Output zero; 3'b001=Output normal TMDS data;
107 * every 2 clk cycles; ...; 7=New pattern every 8 clk cycles. Default 0.
/openbmc/u-boot/drivers/video/meson/
H A Dmeson_dw_hdmi.h12 * Bit 7 RW Reserved. Default 1.
83 /* Bit 14:12 RW tmds_sel: 3'b000=Output zero; 3'b001=Output normal TMDS data;
86 * every 2 clk cycles; ...; 7=New pattern every 8 clk cycles. Default 0.
/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi149 interrupts = <0 6 4>, <0 7 4>;
227 &pmx0 5 0 1 &pmx0 6 1 1 &pmx0 7 2 1>;
242 &pmx0 6 5 1 &pmx0 7 6 1>;
255 gpio-ranges = < &pmx0 0 7 1 &pmx0 1 8 1 &pmx0 2 9 1
257 &pmx0 6 3 1 &pmx0 7 3 1>;
272 &pmx0 6 11 1 &pmx0 7 11 1>;
287 &pmx0 6 13 1 &pmx0 7 13 1>;
294 gpio5: gpio@80b000 {
302 &pmx0 6 16 1 &pmx0 7 16 1>;
317 &pmx0 6 18 1 &pmx0 7 19 1>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx27.dtsi180 uart2: serial@1000b000 {
275 dmas = <&dma 7>;
404 uart5: serial@1001b000 {
550 fec: ethernet@1002b000 {
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8536ds.dtsi71 partition@7f00000 {
76 partition@7f80000 {
240 usb@2b000 {
H A Dmpc8536si-post.dtsi70 interrupt-map-mask = <0xf800 0 0 7>;
99 interrupt-map-mask = <0xf800 0 0 7>;
127 interrupt-map-mask = <0xf800 0 0 7>;
230 usb@2b000 {
/openbmc/linux/arch/arm/boot/dts/nxp/vf/
H A Dvfxxx.dtsi139 <&edma0 0 7>;
272 adc0: adc@4003b000 {
340 gpio2: gpio@4004b000 {
370 gpio-ranges = <&iomuxc 0 128 7>;
435 clks: ccm@4006b000 {
/openbmc/linux/drivers/crypto/intel/qat/qat_common/
H A Dicp_qat_fw_comp.h19 ICP_QAT_FW_COMP_20_CMD_XP10_COMPRESS = 7,
45 #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS 7
182 #define ICP_QAT_FW_COMP_CNV_ERROR_NONE 0b000
336 #define QAT_FW_COMP_BANK_H_BITPOS 7
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8365-pinctrl.yaml143 7: (E1, E0, EN) = (1, 1, 1)
144 So the valid arguments are from 0 to 7.
146 enum: [0, 1, 2, 3, 4, 5, 6, 7]
212 pio: pinctrl@1000b000 {
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm53573.dtsi102 <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
244 gmac1: ethernet@b000 {
/openbmc/linux/arch/arm64/boot/dts/realtek/
H A Drtd16xx.dtsi113 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
171 misc: syscon@1b000 {
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8516.dtsi172 <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
228 pio: pinctrl@1000b000 {
369 i2c2: i2c@1100b000 {
/openbmc/u-boot/doc/uImage.FIT/
H A Dx86-fit-boot.txt92 7 __ksymtab 00007ec0 815740c0 015740c0 005750c0 2**2
122 22 .data..percpu 00007880 8167a000 0167a000 0067b000 2**12
199 Created: Tue Oct 7 10:57:24 2014
202 Created: Tue Oct 7 10:57:24 2014
214 Created: Tue Oct 7 10:57:24 2014
272 7-Oct-2014
/openbmc/u-boot/arch/arm/dts/
H A Domap3-beagle-xm.dts150 etb@5401b000 {
274 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
321 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
H A Dstm32mp157-pinctrl.dtsi127 gpioj: gpio@5000b000 {
230 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
249 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
278 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-beagle-xm.dts154 etb@5401b000 {
281 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
331 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
/openbmc/qemu/hw/adc/
H A Daspeed_adc.c28 #define ASPEED_ADC_ENGINE_MODE_OFF (0b000 << 1)
65 return ((((current >> 16) & ASPEED_ADC_L_MASK) + 7) << 16) | in update_channels()
118 "bounds register %u invalid, only 0...7 valid\n", in aspeed_adc_engine_read()
126 "hysteresis register %u invalid, only 0...7 valid\n", in aspeed_adc_engine_read()
201 "bounds register %u invalid, only 0...7 valid\n", in aspeed_adc_engine_write()
213 "hysteresis register %u invalid, only 0...7 valid\n", in aspeed_adc_engine_write()
/openbmc/linux/Documentation/powerpc/
H A Dtransactional_memory.rst191 These can be checked by the user program's abort handler as TEXASR[0:7]. If
192 bit 7 is set, it indicates that the error is considered persistent. For example
269 if (MSR 29:31 ¬ = 0b010 | SRR1 29:31 ¬ = 0b000) then
/openbmc/linux/net/dsa/
H A Dtag_brcm.c58 #define BRCM_IG_TS_SHIFT 7
154 /* The opcode should never be different than 0b000 */ in brcm_tag_rcv_ll()
/openbmc/linux/Documentation/arch/arm/pxa/
H A Dmfp.rst160 31 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
169 Bit 7: SLEEP_OE_N - enable outputs during low power modes
177 Bit 0 - 2: AF_SEL - alternate function selection, 8 possibilities, from 0-7
179 0b000 - fast 1mA

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