/openbmc/linux/drivers/media/platform/qcom/camss/ |
H A D | camss.c | 258 320000000, 480000000, 600000000 }, 276 320000000, 480000000, 600000000 }, 436 300000000, 404000000, 480000000, 457 300000000, 404000000, 480000000, 555 { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, 575 { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, 595 { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, 617 { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, 637 { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, 657 { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, [all …]
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/openbmc/linux/Documentation/devicetree/bindings/opp/ |
H A D | allwinner,sun50i-h6-operating-points.yaml | 71 opp-480000000 { 73 opp-hz = /bits/ 64 <480000000>;
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/openbmc/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-h6-cpu-opp.dtsi | 11 opp-480000000 { 13 opp-hz = /bits/ 64 <480000000>;
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | r8a77961-ulcb.dts | 22 memory@480000000 {
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H A D | r8a774b1-hihope-rzg2n.dts | 22 memory@480000000 {
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H A D | r8a774b1-hihope-rzg2n-rev2.dts | 22 memory@480000000 {
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H A D | r8a77961-salvator-xs.dts | 22 memory@480000000 {
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H A D | r8a779m3-ulcb.dts | 25 memory@480000000 {
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H A D | r8a779m3-salvator-xs.dts | 26 memory@480000000 {
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H A D | r8a779f0-spider-cpu.dtsi | 51 memory@480000000 {
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/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | sdhci-atmel.txt | 34 assigned-clock-rates = <480000000>;
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra20-peripherals-opp.dtsi | 993 opp-480000000-1100 { 995 opp-hz = /bits/ 64 <480000000>; 1004 opp-480000000-1100 { 1006 opp-hz = /bits/ 64 <480000000>; 1015 opp-480000000-1100 { 1017 opp-hz = /bits/ 64 <480000000>;
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H A D | tegra30-peripherals-opp.dtsi | 1619 opp-480000000-1000 { 1621 opp-hz = /bits/ 64 <480000000>; 1630 opp-480000000-1000 { 1632 opp-hz = /bits/ 64 <480000000>; 1641 opp-480000000-1000 { 1643 opp-hz = /bits/ 64 <480000000>;
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
H A D | sony,imx214.yaml | 118 link-frequencies = /bits/ 64 <480000000>;
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/openbmc/u-boot/arch/arm/mach-at91/include/mach/ |
H A D | clk.h | 22 #define AT91_UTMI_PLL_CLK_FREQ 480000000
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/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
H A D | clock.c | 329 * freq kHz = | 480000000 Hz * -- | * --- * ------ in mxs_set_lcdclk() 332 * 480000000 Hz 18 in mxs_set_lcdclk()
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/openbmc/u-boot/drivers/clk/at91/ |
H A D | clk-utmi.c | 20 #define UTMI_RATE 480000000
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/openbmc/linux/drivers/clk/mxs/ |
H A D | clk-imx28.c | 168 clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000); in mx28_clocks_init() 169 clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000); in mx28_clocks_init()
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/openbmc/linux/drivers/clk/ralink/ |
H A D | clk-mtmips.c | 276 CLK_FIXED("pcmi2s", "xtal", 480000000), 477 return 480000000; in rt3883_cpu_recalc_rate() 501 case 480000000: in rt3883_bus_recalc_rate() 582 return 480000000; in mt7620_pll_recalc_rate()
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/openbmc/linux/drivers/phy/ |
H A D | phy-lpc18xx-usb-otg.c | 33 ret = clk_set_rate(lpc->clk, 480000000); in lpc18xx_usb_otg_phy_init()
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/openbmc/linux/arch/arm/boot/dts/allwinner/ |
H A D | sun8i-a33.dtsi | 77 opp-480000000 { 78 opp-hz = /bits/ 64 <480000000>;
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/openbmc/u-boot/arch/arm/dts/ |
H A D | sun8i-a83t.dtsi | 199 opp-480000000 { 200 opp-hz = /bits/ 64 <480000000>; 252 opp-480000000 { 253 opp-hz = /bits/ 64 <480000000>;
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H A D | sun8i-a33.dtsi | 77 opp-480000000 { 78 opp-hz = /bits/ 64 <480000000>;
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/openbmc/linux/drivers/clk/tegra/ |
H A D | clk-tegra114.c | 457 { 12000000, 480000000, 960, 12, 2, 12 }, 458 { 13000000, 480000000, 960, 13, 2, 12 }, 459 { 16800000, 480000000, 400, 7, 2, 5 }, 460 { 19200000, 480000000, 200, 4, 2, 3 }, 461 { 26000000, 480000000, 960, 26, 2, 12 }, 470 .vco_min = 480000000,
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H A D | clk-tegra30.c | 278 { 12000000, 480000000, 960, 12, 2, 12 }, 279 { 13000000, 480000000, 960, 13, 2, 12 }, 280 { 16800000, 480000000, 400, 7, 2, 5 }, 281 { 19200000, 480000000, 200, 4, 2, 3 }, 282 { 26000000, 480000000, 960, 26, 2, 12 }, 1228 { TEGRA30_CLK_PLL_U, TEGRA30_CLK_CLK_MAX, 480000000, 0 },
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