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Searched +full:0 +full:xffd04000 (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/arm/altera/
H A Dsocfpga-clk-manager.yaml30 reg = <0xffd04000 0x1000>;
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dbase_addr_a10.h9 #define SOCFPGA_EMAC0_ADDRESS 0xff800000
10 #define SOCFPGA_EMAC1_ADDRESS 0xff802000
11 #define SOCFPGA_EMAC2_ADDRESS 0xff804000
12 #define SOCFPGA_SDMMC_ADDRESS 0xff808000
13 #define SOCFPGA_QSPIREGS_ADDRESS 0xff809000
14 #define SOCFPGA_QSPIDATA_ADDRESS 0xffa00000
15 #define SOCFPGA_UART1_ADDRESS 0xffc02100
16 #define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xffcfa000
17 #define SOCFPGA_FPGAMGRDATA_ADDRESS 0xffcfe400
18 #define SOCFPGA_FPGAMGRREGS_ADDRESS 0xffd03000
[all …]
H A Dbase_addr_ac5.h9 #define SOCFPGA_FPGA_SLAVES_ADDRESS 0xc0000000
10 #define SOCFPGA_STM_ADDRESS 0xfc000000
11 #define SOCFPGA_DAP_ADDRESS 0xff000000
12 #define SOCFPGA_EMAC0_ADDRESS 0xff700000
13 #define SOCFPGA_EMAC1_ADDRESS 0xff702000
14 #define SOCFPGA_SDMMC_ADDRESS 0xff704000
15 #define SOCFPGA_QSPI_ADDRESS 0xff705000
16 #define SOCFPGA_GPIO0_ADDRESS 0xff708000
17 #define SOCFPGA_GPIO1_ADDRESS 0xff709000
18 #define SOCFPGA_GPIO2_ADDRESS 0xff70a000
[all …]
/openbmc/qemu/hw/hppa/
H A Dhppa_hardware.h7 #define FIRMWARE_START 0xf0000000
8 #define FIRMWARE_END 0xf0800000
10 #define DEVICE_HPA_LEN 0x00100000
12 #define GSC_HPA 0xffc00000
13 #define DINO_HPA 0xfff80000
14 #define DINO_UART_HPA 0xfff83000
15 #define DINO_UART_BASE 0xfff83800
16 #define DINO_SCSI_HPA 0xfff8c000
17 #define LASI_HPA 0xffd00000
18 #define LASI_UART_HPA 0xffd05000
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi35 #clock-cells = <0>;
44 #clock-cells = <0>;
53 #clock-cells = <0>;
64 i_clk_mgr: clock_manager@0xffd04000 {
67 reg = <0xffd04000 0x00000200>;
73 vco0-psrc = <0>; /* Field: vco0.psrc */
76 mpuclk-cnt = <0>; /* Field: mpuclk.cnt */
77 mpuclk-src = <0>; /* Field: mpuclk.src */
78 nocclk-cnt = <0>; /* Field: nocclk.cnt */
79 nocclk-src = <0>; /* Field: nocclk.src */
[all …]
H A Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
[all …]
H A Dsocfpga_arria10.dtsi31 #size-cells = <0>;
34 cpu@0 {
37 reg = <0>;
52 reg = <0xffffd000 0x1000>,
53 <0xffffc100 0x100>;
73 reg = <0xffda1000 0x1000>;
74 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
75 <0 84 IRQ_TYPE_LEVEL_HIGH>,
76 <0 85 IRQ_TYPE_LEVEL_HIGH>,
77 <0 86 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm7445.dtsi17 #size-cells = <0>;
19 cpu@0 {
23 reg = <0>;
50 reg = <0x00 0xffd01000 0x00 0x1000>,
51 <0x00 0xffd02000 0x00 0x2000>,
52 <0x00 0xffd04000 0x00 0x2000>,
53 <0x00 0xffd06000 0x00 0x2000>;
70 ranges = <0 0x00 0xf0000000 0x1000000>;
74 reg = <0x40ab00 0x20>;
84 reg = <0x404000 0x51c>;
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_arria10.dtsi15 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
35 interrupts = <0 124 4>, <0 125 4>;
37 reg = <0xff111000 0x1000>,
38 <0xff113000 0x1000>;
45 reg = <0xffffd000 0x1000>,
46 <0xffffc100 0x100>;
65 reg = <0xffda1000 0x1000>;
66 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
[all …]
H A Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
[all …]