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/openbmc/linux/Documentation/devicetree/bindings/fpga/
H A Daltera-hps2fpga-bridge.txt17 reg = <0xff400000 0x100000>;
20 bridge-enable = <0>;
25 reg = <0xff500000 0x10000>;
33 reg = <0xff600000 0x100000>;
H A Dfpga-region.txt210 bridge's region (0xff200000) and the hps bridge's region (0xc0000000) for use by
218 reg = <0xff706000 0x1000
219 0xffb90000 0x20>;
220 interrupts = <0 175 4>;
225 reg = <0xff400000 0x100000>;
241 reg = <0xff500000 0x10000>;
257 ranges = <0x20000 0xff200000 0x100000>,
258 <0x0 0xc0000000 0x20000000>;
262 reg = <0x10040 0x20>;
272 reg = <0x0 0x10000>;
[all …]
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dbase_addr_ac5.h9 #define SOCFPGA_FPGA_SLAVES_ADDRESS 0xc0000000
10 #define SOCFPGA_STM_ADDRESS 0xfc000000
11 #define SOCFPGA_DAP_ADDRESS 0xff000000
12 #define SOCFPGA_EMAC0_ADDRESS 0xff700000
13 #define SOCFPGA_EMAC1_ADDRESS 0xff702000
14 #define SOCFPGA_SDMMC_ADDRESS 0xff704000
15 #define SOCFPGA_QSPI_ADDRESS 0xff705000
16 #define SOCFPGA_GPIO0_ADDRESS 0xff708000
17 #define SOCFPGA_GPIO1_ADDRESS 0xff709000
18 #define SOCFPGA_GPIO2_ADDRESS 0xff70a000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Drockchip,rk3308-cru.yaml72 reg = <0xff500000 0x1000>;
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Damlogic,meson-g12a-usb-ctrl.yaml81 "^usb@[0-9a-f]+$":
202 reg = <0xffe09000 0xa0>;
218 reg = <0xff400000 0x40000>;
231 reg = <0xff500000 0x100000>;
235 snps,quirk-frame-length-adjustment = <0x20>;
/openbmc/linux/drivers/mtd/maps/
H A Dichxrom.c30 #define BIOS_CNTL 0x4e
31 #define FWH_DEC_EN1 0xE3
32 #define FWH_DEC_EN2 0xF0
33 #define FWH_SEL1 0xE8
34 #define FWH_SEL2 0xEE
83 window->phys = 0; in ichxrom_cleanup()
84 window->size = 0; in ichxrom_cleanup()
113 window->phys = 0; in ichxrom_init_one()
115 if (byte == 0xff) { in ichxrom_init_one()
116 window->phys = 0xffc00000; in ichxrom_init_one()
[all …]
H A Desb2rom.c34 #define BIOS_CNTL 0xDC
35 #define BIOS_LOCK_ENABLE 0x02
36 #define BIOS_WRITE_ENABLE 0x01
39 #define FWH_DEC_EN1 0xD8
40 #define FWH_F8_EN 0x8000
41 #define FWH_F0_EN 0x4000
42 #define FWH_E8_EN 0x2000
43 #define FWH_E0_EN 0x1000
44 #define FWH_D8_EN 0x0800
45 #define FWH_D0_EN 0x0400
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
[all …]
H A Drk3368.dtsi76 #address-cells = <0x2>;
77 #size-cells = <0x0>;
114 cpu_sleep: cpu-sleep-0 {
116 arm,psci-suspend-param = <0x1010000>;
117 entry-latency-us = <0x3fffffff>;
118 exit-latency-us = <0x40000000>;
119 min-residency-us = <0xffffffff>;
123 cpu_l0: cpu@0 {
126 reg = <0x0 0x0>;
136 reg = <0x0 0x1>;
[all …]
H A Drk3328.dtsi34 #size-cells = <0>;
36 cpu0: cpu@0 {
39 reg = <0x0 0x0>;
47 reg = <0x0 0x1>;
53 reg = <0x0 0x2>;
59 reg = <0x0 0x3>;
125 #clock-cells = <0>;
132 reg = <0x0 0xff000000 0x0 0x1000>;
144 reg = <0x0 0xff010000 0x0 0x1000>;
156 reg = <0x0 0xff020000 0x0 0x1000>;
[all …]
H A Drk3288.dtsi53 #size-cells = <0>;
60 reg = <0x500>;
85 reg = <0x501>;
91 reg = <0x502>;
97 reg = <0x503>;
111 reg = <0xff250000 0x4000>;
122 reg = <0xff600000 0x4000>;
123 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
134 reg = <0xffb20000 0x4000>;
135 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi40 #address-cells = <0x2>;
41 #size-cells = <0x0>;
75 cpu_l0: cpu@0 {
78 reg = <0x0 0x0>;
86 reg = <0x0 0x1>;
94 reg = <0x0 0x2>;
102 reg = <0x0 0x3>;
110 reg = <0x0 0x100>;
118 reg = <0x0 0x101>;
126 reg = <0x0 0x102>;
[all …]
H A Drk3308.dtsi39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0 0x0>;
57 reg = <0x0 0x1>;
67 reg = <0x0 0x2>;
77 reg = <0x0 0x3>;
90 arm,psci-suspend-param = <0x0010000>;
104 cpu0_opp_table: opp-table-0 {
144 #clock-cells = <0>;
162 #clock-cells = <0>;
[all …]
H A Drk3328.dtsi36 #size-cells = <0>;
38 cpu0: cpu@0 {
41 reg = <0x0 0x0>;
54 reg = <0x0 0x1>;
67 reg = <0x0 0x2>;
80 reg = <0x0 0x3>;
96 arm,psci-suspend-param = <0x0010000>;
110 cpu0_opp_table: opp-table-0 {
208 #clock-cells = <0>;
215 reg = <0x0 0xff000000 0x0 0x1000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-axg.dtsi24 tdmif_a: audio-controller-0 {
26 #sound-dai-cells = <0>;
37 #sound-dai-cells = <0>;
48 #sound-dai-cells = <0>;
67 #address-cells = <0x2>;
68 #size-cells = <0x0>;
70 cpu0: cpu@0 {
73 reg = <0x0 0x0>;
76 clocks = <&scpi_dvfs 0>;
82 reg = <0x0 0x1>;
[all …]
H A Dmeson-g12-common.dtsi107 reg = <0x0 0x05000000 0x0 0x300000>;
113 reg = <0x0 0x05300000 0x0 0x2000000>;
120 size = <0x0 0x10000000>;
121 alignment = <0x0 0x400000>;
138 reg = <0x0 0xfc000000 0x0 0x400000>,
139 <0x0 0xff648000 0x0 0x2000>,
140 <0x0 0xfc400000 0x0 0x200000>;
144 interrupt-map-mask = <0 0 0 0>;
145 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
146 bus-range = <0x0 0xff>;
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288.dtsi53 #size-cells = <0>;
60 reg = <0x500>;
71 reg = <0x501>;
82 reg = <0x502>;
93 reg = <0x503>;
103 cpu_opp_table: opp-table-0 {
163 * The rk3288 cannot use the memory area above 0xfe000000
173 reg = <0x0 0xfe000000 0x0 0x1000000>;
181 #clock-cells = <0>;
197 reg = <0x0 0xff810000 0x0 0x20>;
[all …]