Lines Matching +full:0 +full:xff500000
76 #address-cells = <0x2>;
77 #size-cells = <0x0>;
114 cpu_sleep: cpu-sleep-0 {
116 arm,psci-suspend-param = <0x1010000>;
117 entry-latency-us = <0x3fffffff>;
118 exit-latency-us = <0x40000000>;
119 min-residency-us = <0xffffffff>;
123 cpu_l0: cpu@0 {
126 reg = <0x0 0x0>;
136 reg = <0x0 0x1>;
144 reg = <0x0 0x2>;
152 reg = <0x0 0x3>;
160 reg = <0x0 0x100>;
170 reg = <0x0 0x101>;
178 reg = <0x0 0x102>;
186 reg = <0x0 0x103>;
228 #clock-cells = <0>;
236 reg = <0 0xff610000 0 0x400
237 0 0xff620000 0 0x400>;
242 reg = <0x0 0xffac0000 0x0 0x2000>;
248 reg = <0x0 0xff0c0000 0x0 0x4000>;
253 fifo-depth = <0x100>;
260 reg = <0x0 0xff0d0000 0x0 0x4000>;
265 fifo-depth = <0x100>;
272 reg = <0x0 0xff0f0000 0x0 0x4000>;
277 fifo-depth = <0x100>;
284 reg = <0x0 0xff100000 0x0 0x100>;
294 reg = <0x0 0xff110000 0x0 0x1000>;
299 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
301 #size-cells = <0>;
307 reg = <0x0 0xff120000 0x0 0x1000>;
312 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
314 #size-cells = <0>;
320 reg = <0x0 0xff130000 0x0 0x1000>;
325 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
327 #size-cells = <0>;
333 reg = <0x0 0xff140000 0x0 0x1000>;
336 #size-cells = <0>;
340 pinctrl-0 = <&i2c1_xfer>;
346 reg = <0x0 0xff150000 0x0 0x1000>;
349 #size-cells = <0>;
353 pinctrl-0 = <&i2c3_xfer>;
359 reg = <0x0 0xff160000 0x0 0x1000>;
362 #size-cells = <0>;
366 pinctrl-0 = <&i2c4_xfer>;
372 reg = <0x0 0xff170000 0x0 0x1000>;
375 #size-cells = <0>;
379 pinctrl-0 = <&i2c5_xfer>;
385 reg = <0x0 0xff180000 0x0 0x100>;
393 pinctrl-0 = <&uart0_xfer>;
399 reg = <0x0 0xff190000 0x0 0x100>;
413 reg = <0x0 0xff1b0000 0x0 0x100>;
421 pinctrl-0 = <&uart3_xfer>;
427 reg = <0x0 0xff1c0000 0x0 0x100>;
435 pinctrl-0 = <&uart4_xfer>;
444 thermal-sensors = <&tsadc 0>;
509 reg = <0x0 0xff280000 0x0 0x100>;
516 pinctrl-0 = <&otp_gpio>;
526 reg = <0x0 0xff290000 0x0 0x10000>;
543 reg = <0x0 0xff500000 0x0 0x100>;
553 reg = <0x0 0xff580000 0x0 0x40000>;
567 reg = <0x0 0xff650000 0x0 0x1000>;
572 pinctrl-0 = <&i2c0_xfer>;
574 #size-cells = <0>;
580 reg = <0x0 0xff660000 0x0 0x1000>;
583 #size-cells = <0>;
587 pinctrl-0 = <&i2c2_xfer>;
593 reg = <0x0 0xff680000 0x0 0x10>;
596 pinctrl-0 = <&pwm0_pin>;
604 reg = <0x0 0xff680010 0x0 0x10>;
607 pinctrl-0 = <&pwm1_pin>;
615 reg = <0x0 0xff680020 0x0 0x10>;
624 reg = <0x0 0xff680030 0x0 0x10>;
627 pinctrl-0 = <&pwm3_pin>;
635 reg = <0x0 0xff690000 0x0 0x100>;
641 pinctrl-0 = <&uart2_xfer>;
649 reg = <0x0 0xff6b0000 0x0 0x1000>;
661 reg = <0x0 0xff738000 0x0 0x1000>;
666 reg = <0x0 0xff740000 0x0 0x1000>;
671 reg = <0x0 0xff760000 0x0 0x1000>;
679 reg = <0x0 0xff770000 0x0 0x1000>;
684 reg = <0x0 0xff800000 0x0 0x100>;
692 reg = <0x0 0xff810000 0x0 0x20>;
700 #address-cells = <0>;
702 reg = <0x0 0xffb71000 0x0 0x1000>,
703 <0x0 0xffb72000 0x0 0x1000>,
704 <0x0 0xffb74000 0x0 0x2000>,
705 <0x0 0xffb76000 0x0 0x2000>;
714 #address-cells = <0x2>;
715 #size-cells = <0x2>;
720 reg = <0x0 0xff750000 0x0 0x100>;
722 interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
725 #gpio-cells = <0x2>;
728 #interrupt-cells = <0x2>;
733 reg = <0x0 0xff780000 0x0 0x100>;
735 interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
738 #gpio-cells = <0x2>;
741 #interrupt-cells = <0x2>;
746 reg = <0x0 0xff790000 0x0 0x100>;
748 interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
751 #gpio-cells = <0x2>;
754 #interrupt-cells = <0x2>;
759 reg = <0x0 0xff7a0000 0x0 0x100>;
761 interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
764 #gpio-cells = <0x2>;
767 #interrupt-cells = <0x2>;
858 rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
859 <0 7 RK_FUNC_1 &pcfg_pull_none>;
872 rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_none>,
906 rockchip,pins = <0 8 RK_FUNC_2 &pcfg_pull_none>;
929 rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_up>;
1020 rockchip,pins = <0 12 RK_FUNC_2 &pcfg_pull_up>;
1023 rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;
1026 rockchip,pins = <0 10 RK_FUNC_2 &pcfg_pull_up>;
1029 rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;
1035 rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
1039 rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_none>;
1060 rockchip,pins = <0 20 RK_FUNC_3 &pcfg_pull_up>,
1061 <0 21 RK_FUNC_3 &pcfg_pull_none>;
1065 rockchip,pins = <0 22 RK_FUNC_3 &pcfg_pull_none>;
1069 rockchip,pins = <0 23 RK_FUNC_3 &pcfg_pull_none>;
1098 rockchip,pins = <0 27 RK_FUNC_3 &pcfg_pull_up>,
1099 <0 26 RK_FUNC_3 &pcfg_pull_none>;
1103 rockchip,pins = <0 24 RK_FUNC_3 &pcfg_pull_none>;
1107 rockchip,pins = <0 25 RK_FUNC_3 &pcfg_pull_none>;