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/openbmc/linux/drivers/video/fbdev/core/
H A Dsysimgblt.c27 0x00000000,0x000000ff,0x0000ff00,0x0000ffff,
28 0x00ff0000,0x00ff00ff,0x00ffff00,0x00ffffff,
29 0xff000000,0xff0000ff,0xff00ff00,0xff00ffff,
30 0xffff0000,0xffff00ff,0xffffff00,0xffffffff
34 0x00000000,0xff000000,0x00ff0000,0xffff0000,
35 0x0000ff00,0xff00ff00,0x00ffff00,0xffffff00,
36 0x000000ff,0xff0000ff,0x00ff00ff,0xffff00ff,
37 0x0000ffff,0xff00ffff,0x00ffffff,0xffffffff
41 0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff
45 0x00000000, 0xffff0000, 0x0000ffff, 0xffffffff
[all …]
H A Dcfbimgblt.c13 * image can be a bitmap where each 0 represents the background color and
47 0x00000000,0x000000ff,0x0000ff00,0x0000ffff,
48 0x00ff0000,0x00ff00ff,0x00ffff00,0x00ffffff,
49 0xff000000,0xff0000ff,0xff00ff00,0xff00ffff,
50 0xffff0000,0xffff00ff,0xffffff00,0xffffffff
54 0x00000000,0xff000000,0x00ff0000,0xffff0000,
55 0x0000ff00,0xff00ff00,0x00ffff00,0xffffff00,
56 0x000000ff,0xff0000ff,0x00ff00ff,0xffff00ff,
57 0x0000ffff,0xff00ffff,0x00ffffff,0xffffffff
61 0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff
[all …]
/openbmc/linux/arch/s390/pci/
H A Dpci_irq.c35 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT); in zpci_set_airq()
36 struct zpci_fib fib = {0}; in zpci_set_airq()
43 fib.fmt0.aibvo = 0; /* each zdev has its own interrupt vector */ in zpci_set_airq()
48 return zpci_mod_fc(req, &fib, &status) ? -EIO : 0; in zpci_set_airq()
54 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_DEREG_INT); in zpci_clear_airq()
55 struct zpci_fib fib = {0}; in zpci_clear_airq()
63 cc = 0; in zpci_clear_airq()
65 return cc ? -EIO : 0; in zpci_clear_airq()
71 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT_D); in zpci_set_directed_irq()
72 struct zpci_fib fib = {0}; in zpci_set_directed_irq()
[all …]
/openbmc/linux/drivers/net/wireless/intersil/p54/
H A Dp54.h18 #define ISL38XX_DEV_FIRMWARE_ADDR 0x20000
20 #define BR_CODE_MIN 0x80000000
21 #define BR_CODE_COMPONENT_ID 0x80000001
22 #define BR_CODE_COMPONENT_VERSION 0x80000002
23 #define BR_CODE_DEPENDENT_IF 0x80000003
24 #define BR_CODE_EXPOSED_IF 0x80000004
25 #define BR_CODE_DESCR 0x80000101
26 #define BR_CODE_MAX 0x8FFFFFFF
27 #define BR_CODE_END_OF_BRA 0xFF0000FF
28 #define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
[all …]
/openbmc/u-boot/drivers/soc/keystone/
H A Dkeystone_serdes.c13 #define SERDES_CMU_REGS(x) (0x0000 + (0x0c00 * (x)))
14 #define SERDES_LANE_REGS(x) (0x0200 + (0x200 * (x)))
15 #define SERDES_COMLANE_REGS 0x0a00
16 #define SERDES_WIZ_REGS 0x1fc0
18 #define SERDES_CMU_REG_000(x) (SERDES_CMU_REGS(x) + 0x000)
19 #define SERDES_CMU_REG_010(x) (SERDES_CMU_REGS(x) + 0x010)
20 #define SERDES_COMLANE_REG_000 (SERDES_COMLANE_REGS + 0x000)
21 #define SERDES_LANE_REG_000(x) (SERDES_LANE_REGS(x) + 0x000)
22 #define SERDES_LANE_REG_028(x) (SERDES_LANE_REGS(x) + 0x028)
23 #define SERDES_LANE_CTL_STATUS_REG(x) (SERDES_WIZ_REGS + 0x0020 + (4 * (x)))
[all …]
/openbmc/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2.yaml29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
36 clocks = <&clk_controller 0>;
47 clocks = <&clk_controller 0>;
86 #size-cells = <0>;
88 cpu@0 {
91 reg = <0>;
93 clocks = <&clk_controller 0>;
170 #size-cells = <0>;
[all …]
/openbmc/u-boot/arch/x86/cpu/ivybridge/
H A Dlpc.c24 #define NMI_OFF 0
26 #define ENABLE_ACPI_MODE_IN_COREBOOT 0
27 #define TEST_SMM_FLASH_LOCKDOWN 0
35 dm_pci_write_config8(pch, ACPI_CNTL, 0x80); in pch_enable_apic()
37 writel(0, IO_APIC_INDEX); in pch_enable_apic()
46 writel(0, IO_APIC_INDEX); in pch_enable_apic()
48 debug("PCH APIC ID = %x\n", (reg32 >> 24) & 0x0f); in pch_enable_apic()
55 for (i = 0; i < 3; i++) { in pch_enable_apic()
57 debug(" reg 0x%04x:", i); in pch_enable_apic()
59 debug(" 0x%08x\n", reg32); in pch_enable_apic()
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Datafb_utils.h15 * memset(_, 0, _). However their five instances add at least a kilobyte
52 return 0; in fb_memclear_small()
55 " lsr.l #1,%1 ; jcc 1f ; move.b %2,-(%0)\n" in fb_memclear_small()
56 "1: lsr.l #1,%1 ; jcc 1f ; move.w %2,-(%0)\n" in fb_memclear_small()
57 "1: lsr.l #1,%1 ; jcc 1f ; move.l %2,-(%0)\n" in fb_memclear_small()
58 "1: lsr.l #1,%1 ; jcc 1f ; move.l %2,-(%0) ; move.l %2,-(%0)\n" in fb_memclear_small()
61 : "d" (0), "0" ((char *)s + count), "1" (count)); in fb_memclear_small()
66 "2: movem.l %2/%%d4/%%d5/%%d6,-(%0)\n" in fb_memclear_small()
70 : "d" (0), "0" (s), "1" (count) in fb_memclear_small()
74 return 0; in fb_memclear_small()
[all …]
/openbmc/linux/drivers/gpu/drm/tests/
H A Ddrm_format_helper_test.c97 .clip = DRM_RECT_INIT(0, 0, 1, 1),
98 .xrgb8888 = { 0x01FF0000 },
100 .dst_pitch = 0,
101 .expected = { 0x4C },
104 .dst_pitch = 0,
105 .expected = { 0xE0 },
108 .dst_pitch = 0,
109 .expected = { 0xF800 },
110 .expected_swab = { 0x00F8 },
113 .dst_pitch = 0,
[all …]
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-sx150x.c34 SX150X_123 = 0,
39 SX150X_789_REG_MISC_AUTOCLEAR_OFF = 1 << 0,
40 SX150X_MAX_REGISTER = 0xad,
41 SX150X_IRQ_TYPE_EDGE_RISING = 0x1,
42 SX150X_IRQ_TYPE_EDGE_FALLING = 0x2,
43 SX150X_789_RESET_KEY1 = 0x12,
44 SX150X_789_RESET_KEY2 = 0x34,
111 PINCTRL_PIN(0, "gpio0"),
119 PINCTRL_PIN(0, "gpio0"),
131 PINCTRL_PIN(0, "gpio0"),
[all …]
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_workarounds.c26 { INTEL_GEMINILAKE, 0x731c }
41 if (i915_request_wait(rq, 0, HZ / 5) < 0) in request_add_sync()
50 int err = 0; in request_add_spin()
67 memset(lists, 0, sizeof(*lists)); in reference_lists_init()
121 memset(cs, 0xc5, PAGE_SIZE); in read_nonprivs()
131 err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL); in read_nonprivs()
155 for (i = 0; i < RING_MAX_NONPRIV_SLOTS; i++) { in read_nonprivs()
159 *cs++ = 0; in read_nonprivs()
192 for (i = 0; i < RING_MAX_NONPRIV_SLOTS; i++) { in print_results()
196 pr_info("RING_NONPRIV[%d]: expected 0x%08x, found 0x%08x\n", in print_results()
[all …]
/openbmc/u-boot/drivers/video/
H A Dcfb_console.c144 #define CURSOR_OFF console_cursor(0)
161 #define LINUX_LOGO_LUT_OFFSET 0x20
172 #define VIDEO_LOGO_WIDTH 0
173 #define VIDEO_LOGO_HEIGHT 0
204 #define SWAP16(x) ((((x) & 0x00ff) << 8) | \
207 #define SWAP32(x) ((((x) & 0x000000ff) << 24) | \
208 (((x) & 0x0000ff00) << 8) | \
209 (((x) & 0x00ff0000) >> 8) | \
210 (((x) & 0xff000000) >> 24) \
212 #define SHORTSWAP32(x) ((((x) & 0x000000ff) << 8) | \
[all …]
/openbmc/u-boot/tools/
H A Dmxsimage.c25 * OpenSSL 1.1.0 and newer compatibility functions:
28 #if OPENSSL_VERSION_NUMBER < 0x10100000L || \
29 (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x2070000fL)
35 memset(ret, 0, num); in OPENSSL_zalloc()
59 * | 0xf00 == 0xf33d
60 * | 0xba2 == 0xb33f
62 * | 0xf00 |= 0x1337
64 * | 0xba2 == 0xd00d
67 #define SB_HAB_DCD_WRITE 0xccUL
68 #define SB_HAB_DCD_CHECK 0xcfUL
[all …]
/openbmc/linux/arch/sparc/kernel/
H A Dbtext.c46 unsigned long address = 0; in btext_initialize()
49 if (prom_getproperty(node, "width", (char *)&width, 4) < 0) in btext_initialize()
51 if (prom_getproperty(node, "height", (char *)&height, 4) < 0) in btext_initialize()
53 if (prom_getproperty(node, "depth", (char *)&depth, 4) < 0) in btext_initialize()
57 if (prom_getproperty(node, "linebytes", (char *)&prop, 4) >= 0 && in btext_initialize()
58 prop != 0xffffffffu) in btext_initialize()
62 pitch = 0x1000; in btext_initialize()
64 if (prom_getproperty(node, "address", (char *)&prop, 4) >= 0) in btext_initialize()
70 if (address == 0) in btext_initialize()
73 g_loc_X = 0; in btext_initialize()
[all …]
/openbmc/linux/arch/powerpc/kernel/
H A Dbtext.c42 unsigned long disp_BAT[2] __initdata = {0, 0};
75 * The display is mapped to virtual address 0xD0000000, rather
77 * in the region starting at 0xC0000000 (PAGE_OFFSET).
88 unsigned long vaddr = PAGE_OFFSET + 0x10000000; in btext_prepare_BAT()
94 boot_text_mapped = 0; in btext_prepare_BAT()
97 lowbits = addr & ~0xFF000000UL; in btext_prepare_BAT()
98 addr &= 0xFF000000UL; in btext_prepare_BAT()
99 disp_BAT[0] = vaddr | (BL_16M<<2) | 2; in btext_prepare_BAT()
113 g_loc_X = 0; in btext_setup_display()
114 g_loc_Y = 0; in btext_setup_display()
[all …]
/openbmc/qemu/hw/display/
H A Dvga.c74 0x03,
75 0x3d,
76 0x0f,
77 0x3f,
78 0x0e,
79 0x00,
80 0x00,
81 0xff,
85 0x0f, /* 0x00 */
86 0x0f, /* 0x01 */
[all …]
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc20 QEMU_BUILD_BUG_ON(TCG_TYPE_I32 != 0 || TCG_TYPE_I64 != 1);
71 tcg_debug_assert(slot >= 0 && slot <= 1);
87 if (offset == sextract64(offset, 0, 26)) {
90 *src_rw = deposit32(*src_rw, 0, 26, offset);
101 if (offset == sextract64(offset, 0, 19)) {
113 if (offset == sextract64(offset, 0, 14)) {
123 tcg_debug_assert(addend == 0);
137 #define TCG_CT_CONST_AIMM 0x100
138 #define TCG_CT_CONST_LIMM 0x200
139 #define TCG_CT_CONST_ZERO 0x400
[all …]
/openbmc/linux/drivers/net/ethernet/netronome/nfp/bpf/
H A Djit.c261 err = swreg_to_unrestricted(reg_none(), base, reg_imm(0), &reg); in emit_rtn()
267 __emit_br_alu(nfp_prog, reg.areg, reg.breg, 0, defer, reg.dst_lmextn, in emit_rtn()
305 err = swreg_to_unrestricted(dst, dst, reg_imm(imm & 0xff), &reg); in emit_immed()
336 * 0. Even after we do this subtraction, shift amount 0 will be turned in __emit_shf()
337 * into 32 which will eventually be encoded the same as 0 because only in __emit_shf()
339 * FIELD_PREP check done later on shift mask (0x1f), due to 32 is out of in __emit_shf()
390 emit_shf(nfp_prog, dst, lreg, op, rreg, sc, 0); in emit_shf_indir()
567 err = swreg_to_unrestricted(reg_none(), src, reg_imm(0), &reg); in emit_csr_wr()
578 /* CSR value is read in following immed[gpr, 0] */
581 __emit_lcsr(nfp_prog, 0, 0, false, addr, false, false); in __emit_csr_rd()
[all …]
/openbmc/openbmc/meta-raspberrypi/dynamic-layers/multimedia-layer/recipes-multimedia/rpidistro-vlc/files/
H A D0004-mmal_20.patch42 +#define VLC_CODEC_MMAL_ZC_SAND10 VLC_FOURCC('Z','S','D','0')
44 +#define VLC_CODEC_MMAL_ZC_I420 VLC_FOURCC('Z','4','2','0')
48 #define VLC_CODEC_D3D9_OPAQUE VLC_FOURCC('D','X','A','9') /* 4:2:0 8 bpc */
117 @@ -0,0 +1,197 @@
128 +@ Implements /255 as ((x * 257) + 0x8000) >> 16
147 + vmov.u8 d6, #0xff
162 + cmp r3, #0
197 + vmov.u8 \dA, #0xff
216 + vld4.8 {d16[0], d17[0], d18[0], d19[0]}, [r1]!
217 + vld4.8 {d20[0], d21[0], d22[0], d23[0]}, [r2]!
[all …]