1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2d3466830SKalle Valo /*
3d3466830SKalle Valo  * Shared defines for all mac80211 Prism54 code
4d3466830SKalle Valo  *
5d3466830SKalle Valo  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6d3466830SKalle Valo  *
7d3466830SKalle Valo  * Based on the islsm (softmac prism54) driver, which is:
8d3466830SKalle Valo  * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
9d3466830SKalle Valo  */
10d3466830SKalle Valo 
11d3466830SKalle Valo #ifndef P54_H
12d3466830SKalle Valo #define P54_H
13d3466830SKalle Valo 
14d3466830SKalle Valo #ifdef CONFIG_P54_LEDS
15d3466830SKalle Valo #include <linux/leds.h>
16d3466830SKalle Valo #endif /* CONFIG_P54_LEDS */
17d3466830SKalle Valo 
18d3466830SKalle Valo #define ISL38XX_DEV_FIRMWARE_ADDR 0x20000
19d3466830SKalle Valo 
20d3466830SKalle Valo #define BR_CODE_MIN			0x80000000
21d3466830SKalle Valo #define BR_CODE_COMPONENT_ID		0x80000001
22d3466830SKalle Valo #define BR_CODE_COMPONENT_VERSION	0x80000002
23d3466830SKalle Valo #define BR_CODE_DEPENDENT_IF		0x80000003
24d3466830SKalle Valo #define BR_CODE_EXPOSED_IF		0x80000004
25d3466830SKalle Valo #define BR_CODE_DESCR			0x80000101
26d3466830SKalle Valo #define BR_CODE_MAX			0x8FFFFFFF
27d3466830SKalle Valo #define BR_CODE_END_OF_BRA		0xFF0000FF
28d3466830SKalle Valo #define LEGACY_BR_CODE_END_OF_BRA	0xFFFFFFFF
29d3466830SKalle Valo 
30d3466830SKalle Valo struct bootrec {
31d3466830SKalle Valo 	__le32 code;
32d3466830SKalle Valo 	__le32 len;
33d3466830SKalle Valo 	u32 data[10];
34d3466830SKalle Valo } __packed;
35d3466830SKalle Valo 
36d3466830SKalle Valo /* Interface role definitions */
37d3466830SKalle Valo #define BR_INTERFACE_ROLE_SERVER	0x0000
38d3466830SKalle Valo #define BR_INTERFACE_ROLE_CLIENT	0x8000
39d3466830SKalle Valo 
40d3466830SKalle Valo #define BR_DESC_PRIV_CAP_WEP		BIT(0)
41d3466830SKalle Valo #define BR_DESC_PRIV_CAP_TKIP		BIT(1)
42d3466830SKalle Valo #define BR_DESC_PRIV_CAP_MICHAEL	BIT(2)
43d3466830SKalle Valo #define BR_DESC_PRIV_CAP_CCX_CP		BIT(3)
44d3466830SKalle Valo #define BR_DESC_PRIV_CAP_CCX_MIC	BIT(4)
45d3466830SKalle Valo #define BR_DESC_PRIV_CAP_AESCCMP	BIT(5)
46d3466830SKalle Valo 
47d3466830SKalle Valo struct bootrec_desc {
48d3466830SKalle Valo 	__le16 modes;
49d3466830SKalle Valo 	__le16 flags;
50d3466830SKalle Valo 	__le32 rx_start;
51d3466830SKalle Valo 	__le32 rx_end;
52d3466830SKalle Valo 	u8 headroom;
53d3466830SKalle Valo 	u8 tailroom;
54d3466830SKalle Valo 	u8 tx_queues;
55d3466830SKalle Valo 	u8 tx_depth;
56d3466830SKalle Valo 	u8 privacy_caps;
57d3466830SKalle Valo 	u8 rx_keycache_size;
58d3466830SKalle Valo 	u8 time_size;
59d3466830SKalle Valo 	u8 padding;
60d3466830SKalle Valo 	u8 rates[16];
61d3466830SKalle Valo 	u8 padding2[4];
62d3466830SKalle Valo 	__le16 rx_mtu;
63d3466830SKalle Valo } __packed;
64d3466830SKalle Valo 
65d3466830SKalle Valo #define FW_FMAC 0x464d4143
66d3466830SKalle Valo #define FW_LM86 0x4c4d3836
67d3466830SKalle Valo #define FW_LM87 0x4c4d3837
68d3466830SKalle Valo #define FW_LM20 0x4c4d3230
69d3466830SKalle Valo 
70d3466830SKalle Valo struct bootrec_comp_id {
71d3466830SKalle Valo 	__le32 fw_variant;
72d3466830SKalle Valo } __packed;
73d3466830SKalle Valo 
74d3466830SKalle Valo struct bootrec_comp_ver {
75d3466830SKalle Valo 	char fw_version[24];
76d3466830SKalle Valo } __packed;
77d3466830SKalle Valo 
78d3466830SKalle Valo struct bootrec_end {
79d3466830SKalle Valo 	__le16 crc;
80d3466830SKalle Valo 	u8 padding[2];
81d3466830SKalle Valo 	u8 md5[16];
82d3466830SKalle Valo } __packed;
83d3466830SKalle Valo 
84d3466830SKalle Valo /* provide 16 bytes for the transport back-end */
85d3466830SKalle Valo #define P54_TX_INFO_DATA_SIZE		16
86d3466830SKalle Valo 
87d3466830SKalle Valo /* stored in ieee80211_tx_info's rate_driver_data */
88d3466830SKalle Valo struct p54_tx_info {
89d3466830SKalle Valo 	u32 start_addr;
90d3466830SKalle Valo 	u32 end_addr;
91d3466830SKalle Valo 	union {
92d3466830SKalle Valo 		void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)];
93d3466830SKalle Valo 		struct {
94d3466830SKalle Valo 			u32 extra_len;
95d3466830SKalle Valo 		};
96d3466830SKalle Valo 	};
97d3466830SKalle Valo };
98d3466830SKalle Valo 
99d3466830SKalle Valo #define P54_MAX_CTRL_FRAME_LEN		0x1000
100d3466830SKalle Valo 
101d3466830SKalle Valo #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop)	\
102d3466830SKalle Valo do {								\
103d3466830SKalle Valo 	queue.aifs = cpu_to_le16(ai_fs);			\
104d3466830SKalle Valo 	queue.cwmin = cpu_to_le16(cw_min);			\
105d3466830SKalle Valo 	queue.cwmax = cpu_to_le16(cw_max);			\
106d3466830SKalle Valo 	queue.txop = cpu_to_le16(_txop);			\
107d3466830SKalle Valo } while (0)
108d3466830SKalle Valo 
109d3466830SKalle Valo struct p54_edcf_queue_param {
110d3466830SKalle Valo 	__le16 aifs;
111d3466830SKalle Valo 	__le16 cwmin;
112d3466830SKalle Valo 	__le16 cwmax;
113d3466830SKalle Valo 	__le16 txop;
114d3466830SKalle Valo } __packed;
115d3466830SKalle Valo 
116d3466830SKalle Valo struct p54_rssi_db_entry {
117d3466830SKalle Valo 	u16 freq;
118d3466830SKalle Valo 	s16 mul;
119d3466830SKalle Valo 	s16 add;
120d3466830SKalle Valo 	s16 longbow_unkn;
121d3466830SKalle Valo 	s16 longbow_unk2;
122d3466830SKalle Valo };
123d3466830SKalle Valo 
124d3466830SKalle Valo struct p54_cal_database {
125d3466830SKalle Valo 	size_t entries;
126d3466830SKalle Valo 	size_t entry_size;
127d3466830SKalle Valo 	size_t offset;
128d3466830SKalle Valo 	size_t len;
1297b930713SGustavo A. R. Silva 	u8 data[];
130d3466830SKalle Valo };
131d3466830SKalle Valo 
132d3466830SKalle Valo #define EEPROM_READBACK_LEN 0x3fc
133d3466830SKalle Valo 
134d3466830SKalle Valo enum fw_state {
135d3466830SKalle Valo 	FW_STATE_OFF,
136d3466830SKalle Valo 	FW_STATE_BOOTING,
137d3466830SKalle Valo 	FW_STATE_READY,
138d3466830SKalle Valo 	FW_STATE_RESET,
139d3466830SKalle Valo 	FW_STATE_RESETTING,
140d3466830SKalle Valo };
141d3466830SKalle Valo 
142d3466830SKalle Valo #ifdef CONFIG_P54_LEDS
143d3466830SKalle Valo 
144d3466830SKalle Valo #define P54_LED_MAX_NAME_LEN 31
145d3466830SKalle Valo 
146d3466830SKalle Valo struct p54_led_dev {
147d3466830SKalle Valo 	struct ieee80211_hw *hw_dev;
148d3466830SKalle Valo 	struct led_classdev led_dev;
149d3466830SKalle Valo 	char name[P54_LED_MAX_NAME_LEN + 1];
150d3466830SKalle Valo 
151d3466830SKalle Valo 	unsigned int toggled;
152d3466830SKalle Valo 	unsigned int index;
153d3466830SKalle Valo 	unsigned int registered;
154d3466830SKalle Valo };
155d3466830SKalle Valo 
156d3466830SKalle Valo #endif /* CONFIG_P54_LEDS */
157d3466830SKalle Valo 
158d3466830SKalle Valo struct p54_tx_queue_stats {
159d3466830SKalle Valo 	unsigned int len;
160d3466830SKalle Valo 	unsigned int limit;
161d3466830SKalle Valo 	unsigned int count;
162d3466830SKalle Valo };
163d3466830SKalle Valo 
164d3466830SKalle Valo struct p54_common {
165d3466830SKalle Valo 	struct ieee80211_hw *hw;
166d3466830SKalle Valo 	struct ieee80211_vif *vif;
167d3466830SKalle Valo 	void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb);
168d3466830SKalle Valo 	int (*open)(struct ieee80211_hw *dev);
169d3466830SKalle Valo 	void (*stop)(struct ieee80211_hw *dev);
170d3466830SKalle Valo 	struct sk_buff_head tx_pending;
171d3466830SKalle Valo 	struct sk_buff_head tx_queue;
172d3466830SKalle Valo 	struct mutex conf_mutex;
173d3466830SKalle Valo 	bool registered;
174d3466830SKalle Valo 
175d3466830SKalle Valo 	/* memory management (as seen by the firmware) */
176d3466830SKalle Valo 	u32 rx_start;
177d3466830SKalle Valo 	u32 rx_end;
178d3466830SKalle Valo 	u16 rx_mtu;
179d3466830SKalle Valo 	u8 headroom;
180d3466830SKalle Valo 	u8 tailroom;
181d3466830SKalle Valo 
182d3466830SKalle Valo 	/* firmware/hardware info */
183d3466830SKalle Valo 	unsigned int tx_hdr_len;
184d3466830SKalle Valo 	unsigned int fw_var;
185d3466830SKalle Valo 	unsigned int fw_interface;
186d3466830SKalle Valo 	u8 version;
187d3466830SKalle Valo 
188d3466830SKalle Valo 	/* (e)DCF / QOS state */
189d3466830SKalle Valo 	bool use_short_slot;
190d3466830SKalle Valo 	spinlock_t tx_stats_lock;
191d3466830SKalle Valo 	struct p54_tx_queue_stats tx_stats[8];
192d3466830SKalle Valo 	struct p54_edcf_queue_param qos_params[8];
193d3466830SKalle Valo 
194d3466830SKalle Valo 	/* Radio data */
195d3466830SKalle Valo 	u16 rxhw;
196d3466830SKalle Valo 	u8 rx_diversity_mask;
197d3466830SKalle Valo 	u8 tx_diversity_mask;
198d3466830SKalle Valo 	unsigned int output_power;
199d3466830SKalle Valo 	struct p54_rssi_db_entry *cur_rssi;
200d3466830SKalle Valo 	struct ieee80211_channel *curchan;
201d3466830SKalle Valo 	struct survey_info *survey;
202d3466830SKalle Valo 	unsigned int chan_num;
203d3466830SKalle Valo 	struct completion stat_comp;
204d3466830SKalle Valo 	bool update_stats;
205d3466830SKalle Valo 	struct {
206d3466830SKalle Valo 		unsigned int timestamp;
207d3466830SKalle Valo 		unsigned int cached_cca;
208d3466830SKalle Valo 		unsigned int cached_tx;
209d3466830SKalle Valo 		unsigned int cached_rssi;
210d3466830SKalle Valo 		u64 active;
211d3466830SKalle Valo 		u64 cca;
212d3466830SKalle Valo 		u64 tx;
213d3466830SKalle Valo 		u64 rssi;
214d3466830SKalle Valo 	} survey_raw;
215d3466830SKalle Valo 
216d3466830SKalle Valo 	int noise;
217d3466830SKalle Valo 	/* calibration, output power limit and rssi<->dBm conversation data */
218d3466830SKalle Valo 	struct pda_iq_autocal_entry *iq_autocal;
219d3466830SKalle Valo 	unsigned int iq_autocal_len;
220d3466830SKalle Valo 	struct p54_cal_database *curve_data;
221d3466830SKalle Valo 	struct p54_cal_database *output_limit;
222d3466830SKalle Valo 	struct p54_cal_database *rssi_db;
22357fbcce3SJohannes Berg 	struct ieee80211_supported_band *band_table[NUM_NL80211_BANDS];
224d3466830SKalle Valo 
225d3466830SKalle Valo 	/* BBP/MAC state */
226d3466830SKalle Valo 	u8 mac_addr[ETH_ALEN];
227d3466830SKalle Valo 	u8 bssid[ETH_ALEN];
228d3466830SKalle Valo 	u8 mc_maclist[4][ETH_ALEN];
229d3466830SKalle Valo 	u16 wakeup_timer;
230d3466830SKalle Valo 	unsigned int filter_flags;
231d3466830SKalle Valo 	int mc_maclist_num;
232d3466830SKalle Valo 	int mode;
233d3466830SKalle Valo 	u32 tsf_low32, tsf_high32;
234d3466830SKalle Valo 	u32 basic_rate_mask;
235d3466830SKalle Valo 	u16 aid;
236d3466830SKalle Valo 	u8 coverage_class;
237d3466830SKalle Valo 	bool phy_idle;
238d3466830SKalle Valo 	bool phy_ps;
239d3466830SKalle Valo 	bool powersave_override;
240d3466830SKalle Valo 	__le32 beacon_req_id;
241d3466830SKalle Valo 	struct completion beacon_comp;
242d3466830SKalle Valo 
243d3466830SKalle Valo 	/* cryptographic engine information */
244d3466830SKalle Valo 	u8 privacy_caps;
245d3466830SKalle Valo 	u8 rx_keycache_size;
246d3466830SKalle Valo 	unsigned long *used_rxkeys;
247d3466830SKalle Valo 
248d3466830SKalle Valo 	/* LED management */
249d3466830SKalle Valo #ifdef CONFIG_P54_LEDS
250d3466830SKalle Valo 	struct p54_led_dev leds[4];
251d3466830SKalle Valo 	struct delayed_work led_work;
252d3466830SKalle Valo #endif /* CONFIG_P54_LEDS */
253d3466830SKalle Valo 	u16 softled_state;		/* bit field of glowing LEDs */
254d3466830SKalle Valo 
255d3466830SKalle Valo 	/* statistics */
256d3466830SKalle Valo 	struct ieee80211_low_level_stats stats;
257d3466830SKalle Valo 	struct delayed_work work;
258d3466830SKalle Valo 
259d3466830SKalle Valo 	/* eeprom handling */
260d3466830SKalle Valo 	void *eeprom;
261d3466830SKalle Valo 	struct completion eeprom_comp;
262d3466830SKalle Valo 	struct mutex eeprom_mutex;
263d3466830SKalle Valo };
264d3466830SKalle Valo 
265d3466830SKalle Valo /* interfaces for the drivers */
266d3466830SKalle Valo int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb);
267d3466830SKalle Valo void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb);
268d3466830SKalle Valo int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw);
269d3466830SKalle Valo int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len);
270d3466830SKalle Valo int p54_read_eeprom(struct ieee80211_hw *dev);
271d3466830SKalle Valo 
272d3466830SKalle Valo struct ieee80211_hw *p54_init_common(size_t priv_data_len);
273d3466830SKalle Valo int p54_register_common(struct ieee80211_hw *dev, struct device *pdev);
274d3466830SKalle Valo void p54_free_common(struct ieee80211_hw *dev);
275d3466830SKalle Valo 
276d3466830SKalle Valo void p54_unregister_common(struct ieee80211_hw *dev);
277d3466830SKalle Valo 
278d3466830SKalle Valo #endif /* P54_H */
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