Home
last modified time | relevance | path

Searched +full:0 +full:xfc400000 (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dspear-keyboard.txt9 - st,mode: keyboard mode: 0 - 9x9, 1 - 6x6, 2 - 2x2
15 reg = <0xfc400000 0x100>;
16 linux,keymap = < 0x00030012
17 0x0102003a >;
19 st,mode = <0>;
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-apq8084.yaml32 - description: UFS RX symbol 0 clock
34 - description: UFS TX symbol 0 clock
62 reg = <0xfc400000 0x4000>;
69 <&ufsphy 0>,
73 <&sata 0>,
/openbmc/linux/arch/arm/mach-spear/
H A Dspear.h18 #define SPEAR_ICM1_2_BASE UL(0xD0000000)
19 #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000)
20 #define SPEAR_ICM1_UART_BASE UL(0xD0000000)
22 #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
25 #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
26 #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000)
29 #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
30 #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000)
31 #define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
32 #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dspear3xx.dtsi14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0 0x40000000>;
32 ranges = <0xd0000000 0xd0000000 0x30000000>;
37 reg = <0xf1100000 0x1000>;
43 reg = <0xfc400000 0x1000>;
51 reg = <0xe0800000 0x8000>;
62 reg = <0xfc000000 0x1000>;
69 reg = <0xd0100000 0x1000>;
72 #size-cells = <0>;
[all …]
H A Dspear600.dtsi12 #address-cells = <0>;
13 #size-cells = <0>;
23 reg = <0 0x40000000>;
30 ranges = <0xd0000000 0xd0000000 0x30000000>;
35 reg = <0xf1100000 0x1000>;
42 reg = <0xf1000000 0x1000>;
48 reg = <0xfc200000 0x1000>;
56 reg = <0xfc400000 0x1000>;
64 reg = <0xe0800000 0x8000>;
76 reg = <0xd1800000 0x1000 /* FSMC Register */
[all …]
/openbmc/qemu/include/hw/xen/interface/arch-x86/
H A Dxen-x86_32.h27 #define FLAT_RING1_CS 0xe019 /* GDT index 259 */
28 #define FLAT_RING1_DS 0xe021 /* GDT index 260 */
29 #define FLAT_RING1_SS 0xe021 /* GDT index 260 */
30 #define FLAT_RING3_CS 0xe02b /* GDT index 261 */
31 #define FLAT_RING3_DS 0xe033 /* GDT index 262 */
32 #define FLAT_RING3_SS 0xe033 /* GDT index 262 */
41 #define __HYPERVISOR_VIRT_START_PAE 0xF5800000
42 #define __MACH2PHYS_VIRT_START_PAE 0xF5800000
43 #define __MACH2PHYS_VIRT_END_PAE 0xF6800000
49 #define __HYPERVISOR_VIRT_START_NONPAE 0xFC000000
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8084.dtsi21 reg = <0xfa00000 0x200000>;
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
94 reg = <0x0 0x0>;
189 interrupts = <GIC_PPI 7 0xf04>;
195 #clock-cells = <0>;
201 #clock-cells = <0>;
208 interrupts = <GIC_PPI 2 0xf08>,
209 <GIC_PPI 3 0xf08>,
[all …]
H A Dqcom-msm8226.dtsi23 memory@0 {
25 reg = <0x0 0x0>;
31 #clock-cells = <0>;
37 #clock-cells = <0>;
61 qcom,ipc = <&apcs 8 0>;
113 reg = <0x3000000 0x100000>;
118 reg = <0x0dc00000 0x1900000>;
141 qcom,local-pid = <0>;
165 reg = <0xf9000000 0x1000>,
166 <0xf9002000 0x1000>;
[all …]
H A Dqcom-msm8974.dtsi20 #clock-cells = <0>;
26 #clock-cells = <0>;
33 #size-cells = <0>;
34 interrupts = <GIC_PPI 9 0xf04>;
36 CPU0: cpu@0 {
40 reg = <0>;
108 reg = <0x0 0x0>;
113 interrupts = <GIC_PPI 7 0xf04>;
121 qcom,ipc = <&apcs 8 0>;
144 reg = <0x08000000 0x5100000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8994.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
62 reg = <0x0 0x1>;
70 reg = <0x0 0x2>;
78 reg = <0x0 0x3>;
86 reg = <0x0 0x100>;
99 reg = <0x0 0x101>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12-common.dtsi107 reg = <0x0 0x05000000 0x0 0x300000>;
113 reg = <0x0 0x05300000 0x0 0x2000000>;
120 size = <0x0 0x10000000>;
121 alignment = <0x0 0x400000>;
138 reg = <0x0 0xfc000000 0x0 0x400000>,
139 <0x0 0xff648000 0x0 0x2000>,
140 <0x0 0xfc400000 0x0 0x200000>;
144 interrupt-map-mask = <0 0 0 0>;
145 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
146 bus-range = <0x0 0xff>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk356x.dtsi50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0 0x0>;
56 clocks = <&scmi_clk 0>;
65 reg = <0x0 0x100>;
74 reg = <0x0 0x200>;
83 reg = <0x0 0x300>;
90 cpu0_opp_table: opp-table-0 {
140 arm,smc-id = <0x82000010>;
143 #size-cells = <0>;
[all …]